rockchip: rk322x: update MACRO for mmc clksel reg
The description for eMMC/SDIO/SDMMC src is not correct, update the CRU_CLKSEL11_CON value definition according to TRM. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
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@ -162,20 +162,17 @@ enum {
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/* CRU_CLKSEL11_CON */
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EMMC_PLL_SHIFT = 12,
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EMMC_PLL_MASK = 3 << EMMC_PLL_SHIFT,
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EMMC_SEL_APLL = 0,
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EMMC_SEL_DPLL,
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EMMC_SEL_CPLL = 0,
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EMMC_SEL_GPLL,
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EMMC_SEL_24M,
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SDIO_PLL_SHIFT = 10,
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SDIO_PLL_MASK = 3 << SDIO_PLL_SHIFT,
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SDIO_SEL_APLL = 0,
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SDIO_SEL_DPLL,
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SDIO_SEL_CPLL = 0,
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SDIO_SEL_GPLL,
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SDIO_SEL_24M,
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MMC0_PLL_SHIFT = 8,
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MMC0_PLL_MASK = 3 << MMC0_PLL_SHIFT,
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MMC0_SEL_APLL = 0,
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MMC0_SEL_DPLL,
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MMC0_SEL_CPLL = 0,
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MMC0_SEL_GPLL,
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MMC0_SEL_24M,
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MMC0_DIV_SHIFT = 0,
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