fsl_esdhc: Fix esdhc disabled problem on some platforms
Some new platform's esdhc pins don't share with other function. The eSDHC shouldn't be disabled, even if "esdhc" isn't defined in hwconfig env variable. Use CONFIG_FSL_ESDHC_PIN_MUX to fix this problem. Signed-off-by: Chenhui Zhao <b26998@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -508,17 +508,19 @@ int fsl_esdhc_mmc_init(bd_t *bis)
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void fdt_fixup_esdhc(void *blob, bd_t *bd)
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{
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const char *compat = "fsl,esdhc";
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const char *status = "okay";
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#ifdef CONFIG_FSL_ESDHC_PIN_MUX
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if (!hwconfig("esdhc")) {
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status = "disabled";
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goto out;
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do_fixup_by_compat(blob, compat, "status", "disabled",
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8 + 1, 1);
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return;
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}
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#endif
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do_fixup_by_compat_u32(blob, compat, "clock-frequency",
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gd->sdhc_clk, 1);
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out:
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do_fixup_by_compat(blob, compat, "status", status,
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strlen(status) + 1, 1);
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do_fixup_by_compat(blob, compat, "status", "okay",
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4 + 1, 1);
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}
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#endif
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@ -509,6 +509,7 @@ extern int board_pci_host_broken(void);
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#ifdef CONFIG_MMC
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#define CONFIG_FSL_ESDHC
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#define CONFIG_FSL_ESDHC_PIN_MUX
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#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR
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#define CONFIG_CMD_MMC
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#define CONFIG_GENERIC_MMC
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@ -517,6 +517,7 @@
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#ifdef CONFIG_MMC
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#define CONFIG_FSL_ESDHC
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#define CONFIG_FSL_ESDHC_PIN_MUX
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#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC83xx_ESDHC_ADDR
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#define CONFIG_CMD_MMC
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#define CONFIG_GENERIC_MMC
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@ -554,6 +554,7 @@ extern unsigned long get_clock_freq(void);
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#ifdef CONFIG_MMC
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#define CONFIG_FSL_ESDHC
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#define CONFIG_FSL_ESDHC_PIN_MUX
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#define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR
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#define CONFIG_CMD_MMC
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#define CONFIG_GENERIC_MMC
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