Adding Support for BAV335x boards

This commit is contained in:
Gilles Gameiro 2015-02-10 01:36:01 -08:00 committed by Tom Rini
parent d275c40c69
commit a2bc4321e4
12 changed files with 1540 additions and 0 deletions

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@ -381,6 +381,19 @@ config TARGET_AM43XX_EVM
select CPU_V7
select SUPPORT_SPL
config TARGET_BAV335X
bool "Support bav335x"
select CPU_V7
select SUPPORT_SPL
help
The BAV335x OEM Network Processor integrates all the functions of an
embedded network computer in a small, easy to use SODIMM module which
incorporates the popular Texas Instruments Sitara 32bit ARM Coretex-A8
processor, with fast DDR3 512MB SDRAM, 4GB of embedded MMC and a Gigabit
ethernet with simple connection to external connectors.
For more information, visit: http://birdland.com/oem
config TARGET_TI814X_EVM
bool "Support ti814x_evm"
select CPU_V7
@ -836,6 +849,7 @@ source "board/syteco/zmx25/Kconfig"
source "board/tbs/tbs2910/Kconfig"
source "board/ti/am335x/Kconfig"
source "board/ti/am43xx/Kconfig"
source "board/birdland/bav335x/Kconfig"
source "board/ti/ti814x/Kconfig"
source "board/ti/ti816x/Kconfig"
source "board/timll/devkit3250/Kconfig"

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@ -0,0 +1,33 @@
if TARGET_BAV335X
config SYS_BOARD
default "bav335x"
config SYS_VENDOR
default "birdland"
config SYS_SOC
default "am33xx"
config SYS_CONFIG_NAME
default "bav335x"
config CONS_INDEX
int "UART used for console"
range 1 6
default 1
help
The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced
in documentation, etc) available to it. Depending on your specific
board you may want something other than UART0 as for example the IDK
uses UART3 so enter 4 here.
config BAV_VERSION
int "BAV335x Version (1=A, 2=B)"
range 1 2
help
The BAV335x has various version of the board. Rev.A (mostly obsolete)
used 10/100 Ethernet PHY while Rev.B uses a Gigabit Ethernet PHY.
Overwrite this if you have an older Rev.A and want ethernet support.
endif

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@ -0,0 +1,13 @@
BAV335x BOARD
M: Gilles Gameiro <gilles@gigadevices.com>
S: Maintained
F: include/configs/bav335x.h
F: board/birdland/bav335x/Kconfig
F: board/birdland/bav335x/Makefile
F: board/birdland/bav335x/README
F: board/birdland/bav335x/board.c
F: board/birdland/bav335x/board.h
F: board/birdland/bav335x/mux.c
F: board/birdland/bav335x/u-boot.lds
F: configs/birdland_bav335a_defconfig
F: configs/birdland_bav335b_defconfig

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@ -0,0 +1,11 @@
#
# Makefile
#
# Copyright (C) 2012-2014, Birdland Audio - http://birdland.com/oem
#
ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
obj-y := mux.o
endif
obj-y += board.o

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@ -0,0 +1,31 @@
Summary
=======
This document covers various features of the 'BAV335x' board build.
For more information about this board, visit http://birdland.com/oem
Hardware
========
The binary produced supports the bav335x Rev.A with 10/100 MB PHY
and Rev.B (default) with GB ethernet PHY.
If the BAV335x EEPROM is populated and programmed, the board will
automatically detect the version and extract proper serial# and
mac address from the EE.
Customization
=============
The following blocks are required:
- I2C, to talk with the PMIC and ensure that we do not run afoul of
errata 1.0.24.
When removing options as part of customization,
CONFIG_EXTRA_ENV_SETTINGS will need additional care to update for your
needs and to remove no longer relevant options as in some cases we
define additional text blocks (such as for NAND or DFU strings). Also
note that all of the SPL options are grouped together, rather than with
the IP blocks, so both areas will need their choices updated to reflect
the custom design.

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@ -0,0 +1,430 @@
/*
* board.c
*
* Board functions for Birdland Audio BAV335x Network Processor
*
* Copyright (c) 2012-2014 Birdland Audio - http://birdland.com/oem
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <errno.h>
#include <spl.h>
#include <asm/arch/cpu.h>
#include <asm/arch/hardware.h>
#include <asm/arch/omap.h>
#include <asm/arch/ddr_defs.h>
#include <asm/arch/clock.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/mem.h>
#include <asm/io.h>
#include <asm/emif.h>
#include <asm/gpio.h>
#include <i2c.h>
#include <miiphy.h>
#include <cpsw.h>
#include <power/tps65217.h>
#include <power/tps65910.h>
#include <environment.h>
#include <watchdog.h>
#include <environment.h>
#include "board.h"
DECLARE_GLOBAL_DATA_PTR;
/* GPIO that controls power to DDR on EVM-SK */
#define GPIO_DDR_VTT_EN 7
static __maybe_unused struct ctrl_dev *cdev =
(struct ctrl_dev *)CTRL_DEVICE_BASE;
/*
* Read header information from EEPROM into global structure.
*/
static int read_eeprom(struct board_eeconfig *header)
{
/* Check if baseboard eeprom is available */
if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR))
return -ENODEV;
/* read the eeprom using i2c */
if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)header,
sizeof(struct board_eeconfig)))
return -EIO;
if (header->magic != BOARD_MAGIC) {
/* read the i2c eeprom again using only a 1 byte address */
if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 1, (uchar *)header,
sizeof(struct board_eeconfig)))
return -EIO;
if (header->magic != BOARD_MAGIC)
return -EINVAL;
}
return 0;
}
enum board_type get_board_type(bool debug)
{
int ecode;
struct board_eeconfig header;
ecode = read_eeprom(&header);
if (ecode == 0) {
if (header.version[1] == 'A') {
if (debug)
puts("=== Detected Board model BAV335x Rev.A");
return BAV335A;
} else if (header.version[1] == 'B') {
if (debug)
puts("=== Detected Board model BAV335x Rev.B");
return BAV335B;
} else if (debug) {
puts("### Un-known board model in serial-EE\n");
}
} else if (debug) {
switch (ecode) {
case -ENODEV:
puts("### Board doesn't have a serial-EE\n");
break;
case -EINVAL:
puts("### Board serial-EE signature is incorrect.\n");
break;
default:
puts("### IO Error reading serial-EE.\n");
break;
}
}
#if (CONFIG_BAV_VERSION == 1)
if (debug)
puts("### Selecting BAV335A as per config\n");
return BAV335A;
#elif (CONFIG_BAV_VERSION == 2)
if (debug)
puts("### Selecting BAV335B as per config\n");
return BAV335B;
#endif
#if (NOT_DEFINED == 2)
#error "SHOULD NEVER DISPLAY THIS"
#endif
if (debug)
puts("### Defaulting to model BAV335x Rev.B\n");
return BAV335B;
}
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
static const struct ddr_data ddr3_bav335x_data = {
.datardsratio0 = MT41K256M16HA125E_RD_DQS,
.datawdsratio0 = MT41K256M16HA125E_WR_DQS,
.datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
.datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
};
static const struct cmd_control ddr3_bav335x_cmd_ctrl_data = {
.cmd0csratio = MT41K256M16HA125E_RATIO,
.cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
.cmd1csratio = MT41K256M16HA125E_RATIO,
.cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
.cmd2csratio = MT41K256M16HA125E_RATIO,
.cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
};
static struct emif_regs ddr3_bav335x_emif_reg_data = {
.sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
.ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
.sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
.sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
.sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
.zq_config = MT41K256M16HA125E_ZQ_CFG,
.emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY,
};
#ifdef CONFIG_SPL_OS_BOOT
int spl_start_uboot(void)
{
/* break into full u-boot on 'c' */
if (serial_tstc() && serial_getc() == 'c')
return 1;
#ifdef CONFIG_SPL_ENV_SUPPORT
env_init();
env_relocate_spec();
if (getenv_yesno("boot_os") != 1)
return 1;
#endif
return 0;
}
#endif
#define OSC (V_OSCK/1000000)
const struct dpll_params dpll_ddr = {
266, OSC-1, 1, -1, -1, -1, -1};
const struct dpll_params dpll_ddr_evm_sk = {
303, OSC-1, 1, -1, -1, -1, -1};
const struct dpll_params dpll_ddr_bone_black = {
400, OSC-1, 1, -1, -1, -1, -1};
void am33xx_spl_board_init(void)
{
/* debug print detect status */
(void)get_board_type(true);
/* Get the frequency */
/* dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev); */
dpll_mpu_opp100.m = MPUPLL_M_1000;
if (i2c_probe(TPS65217_CHIP_PM))
return;
/* Set the USB Current Limit */
if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE, TPS65217_POWER_PATH,
TPS65217_USB_INPUT_CUR_LIMIT_1800MA,
TPS65217_USB_INPUT_CUR_LIMIT_MASK))
puts("! tps65217_reg_write: could not set USB limit\n");
/* Set the Core Voltage (DCDC3) to 1.125V */
if (tps65217_voltage_update(TPS65217_DEFDCDC3,
TPS65217_DCDC_VOLT_SEL_1125MV)) {
puts("! tps65217_reg_write: could not set Core Voltage\n");
return;
}
/* Set CORE Frequencies to OPP100 */
do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
/* Set the MPU Voltage (DCDC2) */
if (tps65217_voltage_update(TPS65217_DEFDCDC2,
TPS65217_DCDC_VOLT_SEL_1325MV)) {
puts("! tps65217_reg_write: could not set MPU Voltage\n");
return;
}
/*
* Set LDO3, LDO4 output voltage to 3.3V for Beaglebone.
* Set LDO3 to 1.8V and LDO4 to 3.3V for Beaglebone Black.
*/
if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, TPS65217_DEFLS1,
TPS65217_LDO_VOLTAGE_OUT_1_8, TPS65217_LDO_MASK))
puts("! tps65217_reg_write: could not set LDO3\n");
if (tps65217_reg_write(TPS65217_PROT_LEVEL_2, TPS65217_DEFLS2,
TPS65217_LDO_VOLTAGE_OUT_3_3, TPS65217_LDO_MASK))
puts("! tps65217_reg_write: could not set LDO4\n");
/* Set MPU Frequency to what we detected now that voltages are set */
do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
}
const struct dpll_params *get_dpll_ddr_params(void)
{
enable_i2c0_pin_mux();
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
return &dpll_ddr_bone_black;
}
void set_uart_mux_conf(void)
{
#if CONFIG_CONS_INDEX == 1
enable_uart0_pin_mux();
#elif CONFIG_CONS_INDEX == 2
enable_uart1_pin_mux();
#elif CONFIG_CONS_INDEX == 3
enable_uart2_pin_mux();
#elif CONFIG_CONS_INDEX == 4
enable_uart3_pin_mux();
#elif CONFIG_CONS_INDEX == 5
enable_uart4_pin_mux();
#elif CONFIG_CONS_INDEX == 6
enable_uart5_pin_mux();
#endif
}
void set_mux_conf_regs(void)
{
enum board_type board;
board = get_board_type(false);
enable_board_pin_mux(board);
}
const struct ctrl_ioregs ioregs_bonelt = {
.cm0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
.cm1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
.cm2ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
.dt0ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
.dt1ioctl = MT41K256M16HA125E_IOCTRL_VALUE,
};
void sdram_init(void)
{
config_ddr(400, &ioregs_bonelt,
&ddr3_bav335x_data,
&ddr3_bav335x_cmd_ctrl_data,
&ddr3_bav335x_emif_reg_data, 0);
}
#endif
/*
* Basic board specific setup. Pinmux has been handled already.
*/
int board_init(void)
{
#if defined(CONFIG_HW_WATCHDOG)
hw_watchdog_init();
#endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#if defined(CONFIG_NOR) || defined(CONFIG_NAND)
gpmc_init();
#endif
return 0;
}
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
setenv("board_name", "BAV335xB");
setenv("board_rev", "B"); /* Fix me, but why bother.. */
#endif
return 0;
}
#endif
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
static void cpsw_control(int enabled)
{
/* VTP can be added here */
return;
}
static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_addr = 0,
},
{
.slave_reg_ofs = 0x308,
.sliver_reg_ofs = 0xdc0,
.phy_addr = 1,
},
};
static struct cpsw_platform_data cpsw_data = {
.mdio_base = CPSW_MDIO_BASE,
.cpsw_base = CPSW_BASE,
.mdio_div = 0xff,
.channels = 8,
.cpdma_reg_ofs = 0x800,
.slaves = 1,
.slave_data = cpsw_slaves,
.ale_reg_ofs = 0xd00,
.ale_entries = 1024,
.host_port_reg_ofs = 0x108,
.hw_stats_reg_ofs = 0x900,
.bd_ram_ofs = 0x2000,
.mac_control = (1 << 5),
.control = cpsw_control,
.host_port_num = 0,
.version = CPSW_CTRL_VERSION_2,
};
#endif
/*
* This function will:
* Perform fixups to the PHY present on certain boards. We only need this
* function in:
* - SPL with either CPSW or USB ethernet support
* - Full U-Boot, with either CPSW or USB ethernet
* Build in only these cases to avoid warnings about unused variables
* when we build an SPL that has neither option but full U-Boot will.
*/
#if ((defined(CONFIG_SPL_ETH_SUPPORT) || defined(CONFIG_SPL_USBETH_SUPPORT)) &&\
defined(CONFIG_SPL_BUILD)) || \
((defined(CONFIG_DRIVER_TI_CPSW) || \
defined(CONFIG_USB_ETHER) && defined(CONFIG_MUSB_GADGET)) && \
!defined(CONFIG_SPL_BUILD))
int board_eth_init(bd_t *bis)
{
int ecode, rv, n;
uint8_t mac_addr[6];
struct board_eeconfig header;
__maybe_unused enum board_type board;
/* Default manufacturing address; used when no EE or invalid */
n = 0;
mac_addr[0] = 0;
mac_addr[1] = 0x20;
mac_addr[2] = 0x18;
mac_addr[3] = 0x1C;
mac_addr[4] = 0x00;
mac_addr[5] = 0x01;
ecode = read_eeprom(&header);
/* if we have a valid EE, get mac address from there */
if ((ecode == 0) &&
is_valid_ether_addr((const u8 *)&header.mac_addr[0][0])) {
memcpy(mac_addr, (const void *)&header.mac_addr[0][0], 6);
}
#if (defined(CONFIG_DRIVER_TI_CPSW) && !defined(CONFIG_SPL_BUILD)) || \
(defined(CONFIG_SPL_ETH_SUPPORT) && defined(CONFIG_SPL_BUILD))
if (!getenv("ethaddr")) {
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
if (is_valid_ether_addr(mac_addr))
eth_setenv_enetaddr("ethaddr", mac_addr);
}
#ifdef CONFIG_DRIVER_TI_CPSW
board = get_board_type(false);
/* Rev.A uses 10/100 PHY in mii mode */
if (board == BAV335A) {
writel(MII_MODE_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_MII;
cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_MII;
}
/* Rev.B (default) uses GB PHY in rmii mode */
else {
writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel);
cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if
= PHY_INTERFACE_MODE_RGMII;
}
rv = cpsw_register(&cpsw_data);
if (rv < 0)
printf("Error %d registering CPSW switch\n", rv);
else
n += rv;
#endif
#endif
return n;
}
#endif

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@ -0,0 +1,59 @@
/*
* board.c
*
* Board functions for Birdland Audio BAV335x Network Processor
*
* Copyright (c) 2012-2014, Birdland Audio - http://birdland.com/oem
*
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/* Serial MagicE: AA 55 BA BE */
#define BOARD_MAGIC 0xBEBA55AA
enum board_type {UNKNOWN, BAV335A, BAV335B};
/*
* The BAV335x may use a built-in read-only serial EEProm.
* The Evaluation board, disables the write-protect so the Serial-EE
* Can be programmed during manufacturing to store fields such as
* a board serial number, ethernet mac address and other user fields.
* Additionally, the Serial-EE can store the specific version of the
* board it runs on, and overwrite the defaults in _defconfig
*/
#define HDR_NO_OF_MAC_ADDR 3
#define HDR_ETH_ALEN 6
#define HDR_NAME_LEN 8
struct board_eeconfig {
unsigned int magic;
char name[HDR_NAME_LEN]; /* BAV3354 */
char version[4]; /* 0B20 - Rev.B2 */
char serial[12];
char config[32];
char mac_addr[HDR_NO_OF_MAC_ADDR][HDR_ETH_ALEN];
};
enum board_type get_board_type(bool verbose_debug_output);
/*
* We have three pin mux functions that must exist. We must be able to enable
* uart0, for initial output and i2c0 to read the main EEPROM. We then have a
* main pinmux function that can be overridden to enable all other pinmux that
* is required on the board.
*/
void enable_uart0_pin_mux(void);
void enable_uart1_pin_mux(void);
void enable_uart2_pin_mux(void);
void enable_uart3_pin_mux(void);
void enable_uart4_pin_mux(void);
void enable_uart5_pin_mux(void);
void enable_i2c0_pin_mux(void);
void enable_board_pin_mux(enum board_type board);
#endif

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/*
* mux.c
*
* Copyright (c) 2012-2014 Birdland Audio - http://birdland.com/oem
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <common.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>
#include <asm/arch/mux.h>
#include <asm/io.h>
#include <i2c.h>
#include "board.h"
static struct module_pin_mux uart0_pin_mux[] = {
{OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
{OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
{-1},
};
static struct module_pin_mux uart1_pin_mux[] = {
{OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */
{OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */
{-1},
};
static struct module_pin_mux uart2_pin_mux[] = {
{OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */
{OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */
{-1},
};
static struct module_pin_mux uart3_pin_mux[] = {
{OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */
{OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */
{-1},
};
static struct module_pin_mux uart4_pin_mux[] = {
{OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */
{OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */
{-1},
};
static struct module_pin_mux uart5_pin_mux[] = {
{OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)}, /* UART5_RXD */
{OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */
{-1},
};
static struct module_pin_mux mmc0_pin_mux[] = {
{OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */
{OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */
{OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */
{OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */
{OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */
{OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */
{OFFSET(mcasp0_aclkr), (MODE(4) | RXACTIVE)}, /* MMC0_WP */
{OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)}, /* MMC0_CD */
{-1},
};
static struct module_pin_mux mmc1_pin_mux[] = {
{OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT3 */
{OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT2 */
{OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT1 */
{OFFSET(gpmc_ad0), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT0 */
{OFFSET(gpmc_csn1), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CLK */
{OFFSET(gpmc_csn2), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CMD */
{OFFSET(gpmc_csn0), (MODE(7) | RXACTIVE | PULLUP_EN)}, /* MMC1_WP */
{OFFSET(gpmc_advn_ale), (MODE(7) | RXACTIVE | PULLUP_EN)},/* MMC1_CD */
{-1},
};
static struct module_pin_mux i2c0_pin_mux[] = {
{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
{-1},
};
static struct module_pin_mux i2c1_pin_mux[] = {
{OFFSET(spi0_d1), (MODE(2) | RXACTIVE |
PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
{OFFSET(spi0_cs0), (MODE(2) | RXACTIVE |
PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
{-1},
};
static struct module_pin_mux rgmii1_pin_mux[] = {
{OFFSET(mii1_txen), MODE(2)}, /* RGMII1_TCTL */
{OFFSET(mii1_rxdv), MODE(2) | RXACTIVE}, /* RGMII1_RCTL */
{OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */
{OFFSET(mii1_txd2), MODE(2)}, /* RGMII1_TD2 */
{OFFSET(mii1_txd1), MODE(2)}, /* RGMII1_TD1 */
{OFFSET(mii1_txd0), MODE(2)}, /* RGMII1_TD0 */
{OFFSET(mii1_txclk), MODE(2)}, /* RGMII1_TCLK */
{OFFSET(mii1_rxclk), MODE(2) | RXACTIVE}, /* RGMII1_RCLK */
{OFFSET(mii1_rxd3), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */
{OFFSET(mii1_rxd2), MODE(2) | RXACTIVE}, /* RGMII1_RD2 */
{OFFSET(mii1_rxd1), MODE(2) | RXACTIVE}, /* RGMII1_RD1 */
{OFFSET(mii1_rxd0), MODE(2) | RXACTIVE}, /* RGMII1_RD0 */
{OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */
{OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
{-1},
};
static struct module_pin_mux mii1_pin_mux[] = {
{OFFSET(mii1_rxerr), MODE(0) | RXACTIVE}, /* MII1_RXERR */
{OFFSET(mii1_txen), MODE(0)}, /* MII1_TXEN */
{OFFSET(mii1_rxdv), MODE(0) | RXACTIVE}, /* MII1_RXDV */
{OFFSET(mii1_txd3), MODE(0)}, /* MII1_TXD3 */
{OFFSET(mii1_txd2), MODE(0)}, /* MII1_TXD2 */
{OFFSET(mii1_txd1), MODE(0)}, /* MII1_TXD1 */
{OFFSET(mii1_txd0), MODE(0)}, /* MII1_TXD0 */
{OFFSET(mii1_txclk), MODE(0) | RXACTIVE}, /* MII1_TXCLK */
{OFFSET(mii1_rxclk), MODE(0) | RXACTIVE}, /* MII1_RXCLK */
{OFFSET(mii1_rxd3), MODE(0) | RXACTIVE}, /* MII1_RXD3 */
{OFFSET(mii1_rxd2), MODE(0) | RXACTIVE}, /* MII1_RXD2 */
{OFFSET(mii1_rxd1), MODE(0) | RXACTIVE}, /* MII1_RXD1 */
{OFFSET(mii1_rxd0), MODE(0) | RXACTIVE}, /* MII1_RXD0 */
{OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
{OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
{-1},
};
void enable_uart0_pin_mux(void)
{
configure_module_pin_mux(uart0_pin_mux);
}
void enable_uart1_pin_mux(void)
{
configure_module_pin_mux(uart1_pin_mux);
}
void enable_uart2_pin_mux(void)
{
configure_module_pin_mux(uart2_pin_mux);
}
void enable_uart3_pin_mux(void)
{
configure_module_pin_mux(uart3_pin_mux);
}
void enable_uart4_pin_mux(void)
{
configure_module_pin_mux(uart4_pin_mux);
}
void enable_uart5_pin_mux(void)
{
configure_module_pin_mux(uart5_pin_mux);
}
void enable_i2c0_pin_mux(void)
{
configure_module_pin_mux(i2c0_pin_mux);
}
/* CPLD registers */
#define I2C_CPLD_ADDR 0x35
#define CFG_REG 0x10
void enable_board_pin_mux(enum board_type board)
{
configure_module_pin_mux(i2c1_pin_mux);
if (board == BAV335A)
configure_module_pin_mux(mii1_pin_mux); /* MII Mode: 10/100MB */
else
configure_module_pin_mux(rgmii1_pin_mux); /* RGMII Mode: GB */
configure_module_pin_mux(mmc0_pin_mux);
configure_module_pin_mux(mmc1_pin_mux);
}

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@ -0,0 +1,116 @@
/*
* Copyright (c) 2012-2014 Birdland Audio - http://birdland.com/oem
* Copyright (c) 2004-2008 Texas Instruments
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* SPDX-License-Identifier: GPL-2.0+
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
*(.__image_copy_start)
*(.vectors)
CPUDIR/start.o (.text*)
board/birdland/bav335x/built-in.o (.text*)
*(.text*)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : {
*(.data*)
}
. = ALIGN(4);
. = .;
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
}
. = ALIGN(4);
.image_copy_end :
{
*(.__image_copy_end)
}
.rel_dyn_start :
{
*(.__rel_dyn_start)
}
.rel.dyn : {
*(.rel*)
}
.rel_dyn_end :
{
*(.__rel_dyn_end)
}
.hash : { *(.hash*) }
.end :
{
*(.__end)
}
_image_binary_end = .;
/*
* Deprecated: this MMU section is used by pxa at present but
* should not be used by new boards/CPUs.
*/
. = ALIGN(4096);
.mmutable : {
*(.mmutable)
}
/*
* Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
* __bss_base and __bss_limit are for linker only (overlay ordering)
*/
.bss_start __rel_dyn_start (OVERLAY) : {
KEEP(*(.__bss_start));
__bss_base = .;
}
.bss __bss_base (OVERLAY) : {
*(.bss*)
. = ALIGN(4);
__bss_limit = .;
}
.bss_end __bss_limit (OVERLAY) : {
KEEP(*(.__bss_end));
}
.dynsym _image_binary_end : { *(.dynsym) }
.dynbss : { *(.dynbss) }
.dynstr : { *(.dynstr*) }
.dynamic : { *(.dynamic*) }
.gnu.hash : { *(.gnu.hash) }
.plt : { *(.plt*) }
.interp : { *(.interp*) }
.gnu : { *(.gnu*) }
.ARM.exidx : { *(.ARM.exidx*) }
}

View File

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CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
+S:CONFIG_ARM=y
+S:CONFIG_TARGET_BAV335X=y
+S:CONFIG_BAV_VERSION=1

View File

@ -0,0 +1,5 @@
CONFIG_SPL=y
CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1"
+S:CONFIG_ARM=y
+S:CONFIG_TARGET_BAV335X=y
+S:CONFIG_BAV_VERSION=2

633
include/configs/bav335x.h Normal file
View File

@ -0,0 +1,633 @@
/*
* bav335x.h
*
* Copyright (c) 2012-2014 Birdland Audio - http://birdland.com/oem
* Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __CONFIG_BAV335X_H
#define __CONFIG_BAV335X_H
#include <configs/ti_am335x_common.h>
#define CONFIG_ENV_IS_NOWHERE
#ifndef CONFIG_SPL_BUILD
# define CONFIG_FIT
# define CONFIG_TIMESTAMP
# define CONFIG_LZO
# ifdef CONFIG_ENABLE_VBOOT
# define CONFIG_FIT_SIGNATURE
# define CONFIG_RSA
# endif
#endif
#define CONFIG_SYS_BOOTM_LEN (16 << 20)
#define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */
#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
#define CONFIG_BOARD_LATE_INIT
/* Clock Defines */
#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
/* Custom script for NOR */
#define CONFIG_SYS_LDSCRIPT "board/birdland/bav335x/u-boot.lds"
/* Always 128 KiB env size */
#define CONFIG_ENV_SIZE (128 << 10)
/* Enhance our eMMC support / experience. */
#define CONFIG_CMD_GPT
#define CONFIG_EFI_PARTITION
#ifdef CONFIG_NAND
#define NANDARGS \
"mtdids=" MTDIDS_DEFAULT "\0" \
"mtdparts=" MTDPARTS_DEFAULT "\0" \
"nandargs=setenv bootargs console=${console} " \
"${optargs} " \
"root=${nandroot} " \
"rootfstype=${nandrootfstype}\0" \
"nandroot=ubi0:rootfs rw ubi.mtd=9,2048\0" \
"nandrootfstype=ubifs rootwait=1\0" \
"nandboot=echo Booting from nand ...; " \
"run nandargs; " \
"nand read ${fdtaddr} u-boot-spl-os; " \
"nand read ${loadaddr} kernel; " \
"bootz ${loadaddr} - ${fdtaddr}\0"
#else
#define NANDARGS ""
#endif
#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
#ifndef CONFIG_SPL_BUILD
#define CONFIG_EXTRA_ENV_SETTINGS \
DEFAULT_LINUX_BOOT_ENV \
"boot_fdt=try\0" \
"bootpart=0:2\0" \
"bootdir=\0" \
"fdtdir=/dtbs\0" \
"bootfile=zImage\0" \
"fdtfile=undefined\0" \
"console=ttyO0,115200n8\0" \
"loadaddr=0x82000000\0" \
"fdtaddr=0x88000000\0" \
"rdaddr=0x88080000\0" \
"initrd_high=0xffffffff\0" \
"fdt_high=0xffffffff\0" \
"partitions=" \
"uuid_disk=${uuid_gpt_disk};" \
"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
"optargs=\0" \
"cmdline=\0" \
"mmcdev=0\0" \
"mmcpart=1\0" \
"mmcroot=/dev/mmcblk0p2 ro\0" \
"mmcrootfstype=ext4 rootwait fixrtc\0" \
"rootpath=/export/rootfs\0" \
"nfsopts=nolock\0" \
"static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
"ramroot=/dev/ram0 rw\0" \
"ramrootfstype=ext2\0" \
"mmcargs=setenv bootargs console=${console} ${optargs} " \
"root=${mmcroot} rootfstype=${mmcrootfstype} ${cmdline}\0" \
"server_ip=192.168.1.100\0" \
"gw_ip=192.168.1.1\0" \
"netmask=255.255.255.0\0" \
"hostname=\0" \
"device=eth0\0" \
"autoconf=off\0" \
"root_dir=/home/userid/targetNFS\0" \
"nfs_options=,vers=3\0" \
"nfsrootfstype=ext4 rootwait fixrtc\0" \
"nfsargs=setenv bootargs console=${console} ${optargs} " \
"root=/dev/nfs rw rootfstype=${nfsrootfstype} " \
"nfsroot=${nfsroot} ip=${ip} ${cmdline}\0" \
"netargs=setenv bootargs console=${console} " \
"${optargs} root=/dev/nfs " \
"nfsroot=${serverip}:${rootpath},${nfsopts} rw ip=dhcp\0" \
"bootenv=uEnv.txt\0" \
"script=boot.scr\0" \
"scriptfile=${script}\0" \
"loadbootscript=load mmc ${bootpart} ${loadaddr} ${scriptfile};\0" \
"bootscript=echo Running bootscript from mmc${bootpart} ...; " \
"source ${loadaddr}\0" \
"loadbootenv=load mmc ${bootpart} ${loadaddr} ${bootenv}\0" \
"importbootenv=echo Importing environment from mmc ...; " \
"env import -t -r $loadaddr $filesize\0" \
"ramargs=setenv bootargs console=${console} " \
"${optargs} root=${ramroot} rootfstype=${ramrootfstype}\0" \
"loadramdisk=load mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
"loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
"loadrd=load mmc ${bootpart} ${rdaddr} " \
"${bootdir}/${rdfile}; setenv rdsize ${filesize}\0" \
"loadfdt=echo loading ${fdtdir}/${fdtfile} ...; " \
"load mmc ${bootpart} ${fdtaddr} ${fdtdir}/${fdtfile}\0" \
"mmcboot=mmc dev ${mmcdev}; " \
"if mmc rescan; then " \
"gpio set 54;" \
"setenv bootpart ${mmcdev}:1; " \
"if test -e mmc ${bootpart} /etc/fstab; then " \
"setenv mmcpart 1;" \
"fi; " \
"echo Checking for: /uEnv.txt ...;" \
"if test -e mmc ${bootpart} /uEnv.txt; then " \
"if run loadbootenv; then " \
"gpio set 55;" \
"echo Loaded environment from ${bootenv};" \
"run importbootenv;" \
"fi;" \
"echo Checking if uenvcmd is set ...;" \
"if test -n ${uenvcmd}; then " \
"gpio set 56; " \
"echo Running uenvcmd ...;" \
"run uenvcmd;" \
"fi;" \
"echo Checking if client_ip is set ...;" \
"if test -n ${client_ip}; then " \
"if test -n ${dtb}; then " \
"setenv fdtfile ${dtb};" \
"echo using ${fdtfile} ...;" \
"fi;" \
"gpio set 56; " \
"if test -n ${uname_r}; then " \
"echo Running nfsboot_uname_r ...;" \
"run nfsboot_uname_r;" \
"fi;" \
"echo Running nfsboot ...;" \
"run nfsboot;" \
"fi;" \
"fi; " \
"echo Checking for: /${script} ...;" \
"if test -e mmc ${bootpart} /${script}; then " \
"gpio set 55;" \
"setenv scriptfile ${script};" \
"run loadbootscript;" \
"echo Loaded script from ${scriptfile};" \
"gpio set 56; " \
"run bootscript;" \
"fi; " \
"echo Checking for: /boot/${script} ...;" \
"if test -e mmc ${bootpart} /boot/${script}; then " \
"gpio set 55;" \
"setenv scriptfile /boot/${script};" \
"run loadbootscript;" \
"echo Loaded script from ${scriptfile};" \
"gpio set 56; " \
"run bootscript;" \
"fi; " \
"echo Checking for: /boot/uEnv.txt ...;" \
"for i in 1 2 3 4 5 6 7 ; do " \
"setenv mmcpart ${i};" \
"setenv bootpart ${mmcdev}:${mmcpart};" \
"if test -e mmc ${bootpart} /boot/uEnv.txt; then " \
"gpio set 55;" \
"load mmc ${bootpart} ${loadaddr} " \
"/boot/uEnv.txt;" \
"env import -t ${loadaddr} ${filesize};" \
"echo Loaded environment from /boot/uEnv.txt;" \
"if test -n ${dtb}; then " \
"setenv fdtfile ${dtb};" \
"echo Using: dtb=${fdtfile} ...;" \
"fi;" \
"echo Checking if uname_r is set in " \
"/boot/uEnv.txt...;" \
"if test -n ${uname_r}; then " \
"gpio set 56; " \
"echo Running uname_boot ...;" \
"setenv mmcroot /dev/mmcblk${mmcdev}" \
"p${mmcpart} ro;" \
"run uname_boot;" \
"fi;" \
"fi;" \
"done;" \
"fi;\0" \
"netboot=echo Booting from network ...; " \
"setenv autoload no; " \
"dhcp; " \
"tftp ${loadaddr} ${bootfile}; " \
"tftp ${fdtaddr} ${fdtfile}; " \
"run netargs; " \
"bootz ${loadaddr} - ${fdtaddr}\0" \
"nfsboot=echo Booting from ${server_ip} ...; " \
"setenv nfsroot ${server_ip}:${root_dir}${nfs_options}; " \
"setenv ip ${client_ip}:${server_ip}:${gw_ip}:${netmask}:${hostname}" \
":${device}:${autoconf}; " \
"setenv autoload no; " \
"setenv serverip ${server_ip}; " \
"setenv ipaddr ${client_ip}; " \
"tftp ${loadaddr} ${bootfile}; " \
"tftp ${fdtaddr} dtbs/${fdtfile}; " \
"run nfsargs; " \
"bootz ${loadaddr} - ${fdtaddr}\0" \
"nfsboot_uname_r=echo Booting from ${server_ip} ...; " \
"setenv nfsroot ${server_ip}:${root_dir}${nfs_options}; " \
"setenv ip ${client_ip}:${server_ip}:${gw_ip}:${netmask}:${hostname}" \
":${device}:${autoconf}; " \
"setenv autoload no; " \
"setenv serverip ${server_ip}; " \
"setenv ipaddr ${client_ip}; " \
"tftp ${loadaddr} vmlinuz-${uname_r}; " \
"tftp ${fdtaddr} dtbs/${uname_r}/${fdtfile}; " \
"run nfsargs; " \
"bootz ${loadaddr} - ${fdtaddr}\0" \
"ramboot=echo Booting from ramdisk ...; " \
"run ramargs; " \
"bootz ${loadaddr} ${rdaddr} ${fdtaddr}\0" \
"findfdt="\
"if test $board_rev = B; then " \
"setenv fdtfile birdland_bav335b.dtb; " \
"setenv fdtbase am335x-boneblack; fi; " \
"if test $board_rev = A; then " \
"setenv fdtfile birdland_bav335a.dtb; " \
"setenv fdtbase am335x-boneblack; fi; " \
"if test $fdtfile = undefined; then " \
"echo WARNING: Could not determine device tree to use; fi; \0" \
"uname_boot="\
"setenv bootdir /boot; " \
"setenv bootfile vmlinuz-${uname_r}; " \
"if test -e mmc ${bootpart} ${bootdir}/${bootfile}; then " \
"echo loading ${bootdir}/${bootfile} ...; "\
"run loadimage;" \
"setenv fdtdir /boot/dtbs/${uname_r}; " \
"if test -e mmc ${bootpart} ${fdtdir}/${fdtfile}; then " \
"run loadfdt;" \
"else " \
"setenv fdtdir /lib/firmware/${uname_r}/device-tree; " \
"if test -e mmc ${bootpart} ${fdtdir}/" \
"${fdtfile}; then " \
"run loadfdt;" \
"else " \
"setenv fdtdir /boot/dtb-${uname_r}; " \
"if test -e mmc ${bootpart} ${fdtdir}" \
"/${fdtfile}; then " \
"run loadfdt;" \
"else " \
"setenv fdtdir /boot/dtbs; " \
"if test -e mmc ${bootpart} ${fdtdir}" \
"/${fdtfile}; then " \
"run loadfdt;" \
"else " \
"echo; echo unable to find " \
"[${fdtfile}] " \
"did you name it correctly?" \
"echo booting fallback " \
"[/boot/dtbs/" \
"${uname_r}" \
"/${fdtbase}.dtb]...;" \
"setenv fdtdir /boot/dtbs/" \
"${uname_r}; " \
"setenv fdtfile " \
"${fdtbase}.dtb; " \
"run loadfdt;" \
"fi;" \
"fi;" \
"fi;" \
"fi;" \
"fi; " \
"setenv rdfile initrd.img-${uname_r}; " \
"if test -e mmc ${bootpart} ${bootdir}/${rdfile}; then " \
"echo loading ${bootdir}/${rdfile} ...; "\
"run loadrd;" \
"if test -n ${uuid}; then " \
"setenv mmcroot UUID=${uuid} ro;" \
"fi;" \
"run mmcargs;" \
"echo debug: [${bootargs}] ... ;" \
"echo debug: [bootz ${loadaddr} ${rdaddr}:${rdsize} " \
"${fdtaddr}] ... ;" \
"bootz ${loadaddr} ${rdaddr}:${rdsize} ${fdtaddr}; " \
"else " \
"run mmcargs;" \
"echo debug: [${bootargs}] ... ;" \
"echo debug: [bootz ${loadaddr} - ${fdtaddr}] ... ;" \
"bootz ${loadaddr} - ${fdtaddr}; " \
"fi;" \
"fi;\0" \
NANDARGS \
DFUARGS
#endif
#define CONFIG_BOOTCOMMAND \
"gpio set 53; " \
"i2c mw 0x24 1 0x3e; " \
"run findfdt; " \
"setenv mmcdev 0; " \
"setenv bootpart 0:1; " \
"run mmcboot;" \
"gpio clear 56; " \
"gpio clear 55; " \
"gpio clear 54; " \
"setenv mmcdev 1; " \
"setenv bootpart 1:1; " \
"run mmcboot;"
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
#define CONFIG_BAUDRATE 115200
#define CONFIG_CMD_EEPROM
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
#define CONFIG_SYS_I2C_MULTI_EEPROMS
/* PMIC support */
#define CONFIG_POWER_TPS65217
#define CONFIG_POWER_TPS65910
/* SPL */
#ifndef CONFIG_NOR_BOOT
#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_YMODEM_SUPPORT
/* Bootcount using the RTC block */
#define CONFIG_BOOTCOUNT_LIMIT
#define CONFIG_BOOTCOUNT_AM33XX
#define CONFIG_SYS_BOOTCOUNT_BE
/* USB gadget RNDIS */
#define CONFIG_SPL_MUSB_NEW_SUPPORT
#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
#endif
#ifdef CONFIG_NAND
/* NAND: device related configs */
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_PAGE_SIZE 2048
#define CONFIG_SYS_NAND_OOBSIZE 64
#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
/* NAND: driver related configs */
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS { \
2, 3, 4, 5, 6, 7, 8, 9, \
10, 11, 12, 13, 14, 15, 16, 17, \
18, 19, 20, 21, 22, 23, 24, 25, \
26, 27, 28, 29, 30, 31, 32, 33, \
34, 35, 36, 37, 38, 39, 40, 41, \
42, 43, 44, 45, 46, 47, 48, 49, \
50, 51, 52, 53, 54, 55, 56, 57, }
#define CONFIG_SYS_NAND_ECCSIZE 512
#define CONFIG_SYS_NAND_ECCBYTES 14
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW
#define MTDIDS_DEFAULT "nand0=nand.0"
#define MTDPARTS_DEFAULT \
"mtdparts=nand.0:" \
"128k(NAND.SPL)," \
"128k(NAND.SPL.backup1)," \
"128k(NAND.SPL.backup2)," \
"128k(NAND.SPL.backup3)," \
"256k(NAND.u-boot-spl-os)," \
"1m(NAND.u-boot)," \
"128k(NAND.u-boot-env)," \
"128k(NAND.u-boot-env.backup1)," \
"8m(NAND.kernel)," \
"-(NAND.rootfs)"
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000
#undef CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET 0x001c0000
#define CONFIG_ENV_OFFSET_REDUND 0x001e0000
#define CONFIG_SYS_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
/* NAND: SPL related configs */
#ifdef CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_AM33XX_BCH
#endif
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os parameters */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* !CONFIG_NAND */
/*
* For NOR boot, we must set this to the start of where NOR is mapped
* in memory.
*/
#ifdef CONFIG_NOR_BOOT
#define CONFIG_SYS_TEXT_BASE 0x08000000
#endif
/*
* USB configuration. We enable MUSB support, both for host and for
* gadget. We set USB0 as peripheral and USB1 as host, based on the
* board schematic and physical port wired to each. Then for host we
* add mass storage support and for gadget we add both RNDIS ethernet
* and DFU.
*/
#define CONFIG_USB_MUSB_DSPS
#define CONFIG_ARCH_MISC_INIT
#define CONFIG_MUSB_GADGET
#define CONFIG_MUSB_PIO_ONLY
#define CONFIG_MUSB_DISABLE_BULK_COMBINE_SPLIT
#define CONFIG_USB_GADGET
#define CONFIG_USBDOWNLOAD_GADGET
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_USB_GADGET_VBUS_DRAW 2
#define CONFIG_MUSB_HOST
#define CONFIG_AM335X_USB0
#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL
#define CONFIG_AM335X_USB1
#define CONFIG_AM335X_USB1_MODE MUSB_HOST
#ifndef CONFIG_SPL_USBETH_SUPPORT
/* Fastboot */
#define CONFIG_CMD_FASTBOOT
#define CONFIG_ANDROID_BOOT_IMAGE
#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000
/* To support eMMC booting */
#define CONFIG_STORAGE_EMMC
#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1
#endif
#ifdef CONFIG_MUSB_HOST
#define CONFIG_CMD_USB
#define CONFIG_USB_STORAGE
#endif
#ifdef CONFIG_MUSB_GADGET
#define CONFIG_CMD_USB_MASS_STORAGE
#define CONFIG_USB_GADGET_MASS_STORAGE
/* USB TI's IDs */
#define CONFIG_G_DNL_VENDOR_NUM 0x0451
#define CONFIG_G_DNL_PRODUCT_NUM 0xD022
#define CONFIG_G_DNL_MANUFACTURER "Texas Instruments"
#endif /* CONFIG_MUSB_GADGET */
#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
/* disable host part of MUSB in SPL */
#undef CONFIG_MUSB_HOST
/* disable EFI partitions and partition UUID support */
#undef CONFIG_PARTITION_UUIDS
#undef CONFIG_EFI_PARTITION
/* General network SPL */
#define CONFIG_SPL_NET_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_NET_VCI_STRING "BAV335x U-Boot SPL"
#endif
/* USB Device Firmware Update support */
#ifndef CONFIG_SPL_BUILD
#define CONFIG_DFU_FUNCTION
#define CONFIG_DFU_MMC
#define CONFIG_CMD_DFU
#define DFU_ALT_INFO_MMC \
"dfu_alt_info_mmc=" \
"boot part 0 1;" \
"rootfs part 0 2;" \
"MLO fat 0 1;" \
"MLO.raw raw 0x100 0x100;" \
"u-boot.img.raw raw 0x300 0x400;" \
"spl-os-args.raw raw 0x80 0x80;" \
"spl-os-image.raw raw 0x900 0x2000;" \
"spl-os-args fat 0 1;" \
"spl-os-image fat 0 1;" \
"u-boot.img fat 0 1;" \
"uEnv.txt fat 0 1\0"
#ifdef CONFIG_NAND
#define CONFIG_DFU_NAND
#define DFU_ALT_INFO_NAND \
"dfu_alt_info_nand=" \
"SPL part 0 1;" \
"SPL.backup1 part 0 2;" \
"SPL.backup2 part 0 3;" \
"SPL.backup3 part 0 4;" \
"u-boot part 0 5;" \
"u-boot-spl-os part 0 6;" \
"kernel part 0 8;" \
"rootfs part 0 9\0"
#else
#define DFU_ALT_INFO_NAND ""
#endif
#define CONFIG_DFU_RAM
#define DFU_ALT_INFO_RAM \
"dfu_alt_info_ram=" \
"kernel ram 0x80200000 0xD80000;" \
"fdt ram 0x80F80000 0x80000;" \
"ramdisk ram 0x81000000 0x4000000\0"
#define DFUARGS \
"dfu_alt_info_emmc=rawemmc raw 0 3751936\0" \
DFU_ALT_INFO_MMC \
DFU_ALT_INFO_RAM \
DFU_ALT_INFO_NAND
#endif
/*
* Default to using SPI for environment, etc.
* 0x000000 - 0x020000 : SPL (128KiB)
* 0x020000 - 0x0A0000 : U-Boot (512KiB)
* 0x0A0000 - 0x0BFFFF : First copy of U-Boot Environment (128KiB)
* 0x0C0000 - 0x0DFFFF : Second copy of U-Boot Environment (128KiB)
* 0x0E0000 - 0x442000 : Linux Kernel
* 0x442000 - 0x800000 : Userland
*/
#if defined(CONFIG_SPI_BOOT)
/* SPL related */
#undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
#define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */
#define CONFIG_ENV_OFFSET (768 << 10) /* 768 KiB in */
#define CONFIG_ENV_OFFSET_REDUND (896 << 10) /* 896 KiB in */
#define MTDIDS_DEFAULT "nor0=m25p80-flash.0"
#define MTDPARTS_DEFAULT "mtdparts=m25p80-flash.0:128k(SPL)," \
"512k(u-boot),128k(u-boot-env1)," \
"128k(u-boot-env2),3464k(kernel)," \
"-(rootfs)"
#elif defined(CONFIG_EMMC_BOOT)
#undef CONFIG_ENV_IS_NOWHERE
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SYS_MMC_ENV_DEV 1
#define CONFIG_SYS_MMC_ENV_PART 2
#define CONFIG_ENV_OFFSET 0x0
#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#endif
/* SPI flash. */
#define CONFIG_CMD_SF
#define CONFIG_SPI_FLASH
#define CONFIG_SPI_FLASH_WINBOND
#define CONFIG_SF_DEFAULT_SPEED 24000000
/* Network. */
#define CONFIG_PHY_GIGE
#define CONFIG_PHYLIB
#define CONFIG_PHY_SMSC
/*
* NOR Size = 16 MiB
* Number of Sectors/Blocks = 128
* Sector Size = 128 KiB
* Word length = 16 bits
* Default layout:
* 0x000000 - 0x07FFFF : U-Boot (512 KiB)
* 0x080000 - 0x09FFFF : First copy of U-Boot Environment (128 KiB)
* 0x0A0000 - 0x0BFFFF : Second copy of U-Boot Environment (128 KiB)
* 0x0C0000 - 0x4BFFFF : Linux Kernel (4 MiB)
* 0x4C0000 - 0xFFFFFF : Userland (11 MiB + 256 KiB)
*/
#if defined(CONFIG_NOR)
#undef CONFIG_SYS_NO_FLASH
#define CONFIG_CMD_FLASH
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
#define CONFIG_SYS_FLASH_PROTECTION
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER
#define CONFIG_FLASH_CFI_MTD
#define CONFIG_SYS_MAX_FLASH_SECT 128
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_FLASH_BASE (0x08000000)
#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
#define CONFIG_SYS_FLASH_SIZE 0x01000000
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
/* Reduce SPL size by removing unlikey targets */
#ifdef CONFIG_NOR_BOOT
#define CONFIG_ENV_IS_IN_FLASH
#define CONFIG_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
#define CONFIG_ENV_OFFSET (512 << 10) /* 512 KiB */
#define CONFIG_ENV_OFFSET_REDUND (768 << 10) /* 768 KiB */
#define MTDIDS_DEFAULT "nor0=physmap-flash.0"
#define MTDPARTS_DEFAULT \
"mtdparts=physmap-flash.0:" \
"512k(u-boot)," \
"128k(u-boot-env1)," \
"128k(u-boot-env2)," \
"4m(kernel),-(rootfs)"
#endif
#endif /* NOR support */
#endif /* ! __CONFIG_AM335X_EVM_H */