blackfin: spi clock is in sysclk1 domain instead of sysclk0

Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
This commit is contained in:
Scott Jiang 2014-05-30 16:43:34 +08:00 committed by Sonic Zhang
parent 08b6a61162
commit 9f9a65c80a

View File

@ -78,7 +78,7 @@ extern u_long get_sclk1(void);
extern u_long get_dclk(void);
# define get_uart_clk get_sclk0
# define get_i2c_clk get_sclk0
# define get_spi_clk get_sclk0
# define get_spi_clk get_sclk1
#else
# define get_uart_clk get_sclk
# define get_i2c_clk get_sclk