leandrof/u-boot
1
0
Fork 1
Code Issues Pull Requests Packages Projects Releases Wiki Activity

arm64: zynqmp: zcu106: fix SPL MMC booting

Browse Source 
The U-Boot SPL generated with the current zcu106 defconfig cannot boot
from MMC:

  [...]
  U-Boot SPL 2018.01 (Feb 21 2018 - 17:47:14)
  EL Level:  EL3
  Trying to boot from MMC1
  sdhci_transfer_data: Error detected in status(0x408020)!
  spl_load_image_fat_os: error reading image u-boot.bin, err - -2
  spl_load_image_fat: error reading image u-boot.img, err - -6
  SPL: failed to boot from all boot devices
  ### ERROR ### Please RESET the board ###

Fix by lowering the rpll value. The new value for the RPLL_CTRL
register comes from the current psu_init_gpl.c from the HDF file at
01ad8ea5fd/zcu106-zynqmp
(generated by Vivado v2017.4).

RPLL and sdio1_ref clocks before and after this change:

 - Old values: RPLL 1.36 GHz, sdio1_ref 272 MHz
 - New values: RPLL 1.16 GHz, sdio1_ref 233 MHz

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Luca Ceresoli
2018-03-12 17:18:37 +01:00
committed by Michal Simek
parent 8d7cabb78d
commit 9bc2b2d39c
1 changed files with 1 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
board/xilinx/zynqmp/zynqmp-zcu106-revA/psu_init_gpl.c
View File

@@ -10,7 +10,7 @@
static unsigned long psu_pll_init_data(void)
{
psu_mask_write(0xFF5E0034, 0xFE7FEDEFU, 0x7E4E2C62U);
psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00013C00U);
psu_mask_write(0xFF5E0030, 0x00717F00U, 0x00014600U);
psu_mask_write(0xFF5E0030, 0x00000008U, 0x00000008U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000001U);
psu_mask_write(0xFF5E0030, 0x00000001U, 0x00000000U);