sunxi: Support PSCI ops on Allwinner H3
H3 has the same power sequencing procedure as the A31/A31s, which includes the power clamps. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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@ -106,7 +106,7 @@ psci_fiq_enter:
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str r10, [r8, #0x100]
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timer_wait r10, ONE_MS
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#ifdef CONFIG_MACH_SUN6I
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#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN8I_H3)
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@ Activate power clamp
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lsl r12, r9, #2 @ x4
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add r12, r12, r8
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@ -170,7 +170,7 @@ psci_cpu_on:
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movw r0, #(SUNXI_PRCM_BASE & 0xffff)
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movt r0, #(SUNXI_PRCM_BASE >> 16)
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#ifdef CONFIG_MACH_SUN6I
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#if defined(CONFIG_MACH_SUN6I) || defined(CONFIG_MACH_SUN8I_H3)
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@ Release power clamp
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lsl r5, r1, #2 @ 1 register per CPU
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add r5, r5, r0 @ PRCM
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