mmc: sdhci-cadence: use bitfield access macros for cleanup
This driver is a counterpart from the one in Linux. Follow the clean-up I did in Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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@ -7,6 +7,7 @@
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#include <common.h>
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#include <dm.h>
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#include <linux/bitfield.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/sizes.h>
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@ -19,15 +20,14 @@
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#define SDHCI_CDNS_HRS04_ACK BIT(26)
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#define SDHCI_CDNS_HRS04_RD BIT(25)
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#define SDHCI_CDNS_HRS04_WR BIT(24)
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#define SDHCI_CDNS_HRS04_RDATA_SHIFT 16
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#define SDHCI_CDNS_HRS04_WDATA_SHIFT 8
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#define SDHCI_CDNS_HRS04_ADDR_SHIFT 0
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#define SDHCI_CDNS_HRS04_RDATA GENMASK(23, 16)
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#define SDHCI_CDNS_HRS04_WDATA GENMASK(15, 8)
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#define SDHCI_CDNS_HRS04_ADDR GENMASK(5, 0)
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#define SDHCI_CDNS_HRS06 0x18 /* eMMC control */
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#define SDHCI_CDNS_HRS06_TUNE_UP BIT(15)
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#define SDHCI_CDNS_HRS06_TUNE_SHIFT 8
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#define SDHCI_CDNS_HRS06_TUNE_MASK 0x3f
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#define SDHCI_CDNS_HRS06_MODE_MASK 0x7
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#define SDHCI_CDNS_HRS06_TUNE GENMASK(13, 8)
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#define SDHCI_CDNS_HRS06_MODE GENMASK(2, 0)
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#define SDHCI_CDNS_HRS06_MODE_SD 0x0
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#define SDHCI_CDNS_HRS06_MODE_MMC_SDR 0x2
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#define SDHCI_CDNS_HRS06_MODE_MMC_DDR 0x3
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@ -84,8 +84,8 @@ static int sdhci_cdns_write_phy_reg(struct sdhci_cdns_plat *plat,
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u32 tmp;
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int ret;
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tmp = (data << SDHCI_CDNS_HRS04_WDATA_SHIFT) |
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(addr << SDHCI_CDNS_HRS04_ADDR_SHIFT);
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tmp = FIELD_PREP(SDHCI_CDNS_HRS04_WDATA, data) |
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FIELD_PREP(SDHCI_CDNS_HRS04_ADDR, addr);
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writel(tmp, reg);
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tmp |= SDHCI_CDNS_HRS04_WR;
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@ -152,8 +152,8 @@ static void sdhci_cdns_set_control_reg(struct sdhci_host *host)
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}
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tmp = readl(plat->hrs_addr + SDHCI_CDNS_HRS06);
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tmp &= ~SDHCI_CDNS_HRS06_MODE_MASK;
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tmp |= mode;
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tmp &= ~SDHCI_CDNS_HRS06_MODE;
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tmp |= FIELD_PREP(SDHCI_CDNS_HRS06_MODE, mode);
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writel(tmp, plat->hrs_addr + SDHCI_CDNS_HRS06);
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}
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