armv8/ls1043ardb: esdhc: Add esdhc support for ls1043ardb
This patch adds esdhc support for ls1043ardb. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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@ -25,7 +25,7 @@ void get_sys_info(struct sys_info *sys_info)
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struct fsl_ifc ifc_regs = {(void *)CONFIG_SYS_IFC_ADDR, (void *)NULL};
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u32 ccr;
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#endif
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#ifdef CONFIG_SYS_DPAA_FMAN
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#if defined(CONFIG_FSL_ESDHC) || defined(CONFIG_SYS_DPAA_FMAN)
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u32 rcw_tmp;
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#endif
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struct ccsr_clk *clk = (void *)(CONFIG_SYS_FSL_CLK_ADDR);
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@ -105,6 +105,11 @@ void get_sys_info(struct sys_info *sys_info)
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#define HWA_CGA_M2_CLK_SEL 0x00000007
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#define HWA_CGA_M2_CLK_SHIFT 0
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#ifdef CONFIG_FSL_ESDHC
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rcw_tmp = in_be32(&gur->rcwsr[15]);
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rcw_tmp = (rcw_tmp & HWA_CGA_M2_CLK_SEL) >> HWA_CGA_M2_CLK_SHIFT;
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sys_info->freq_sdhc = freq_c_pll[1] / rcw_tmp;
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#endif
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#if defined(CONFIG_FSL_IFC)
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ccr = ifc_in32(&ifc_regs.gregs->ifc_ccr);
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@ -123,6 +128,10 @@ int get_clocks(void)
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gd->bus_clk = sys_info.freq_systembus;
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gd->mem_clk = sys_info.freq_ddrbus;
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#ifdef CONFIG_FSL_ESDHC
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gd->arch.sdhc_clk = sys_info.freq_sdhc;
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#endif
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if (gd->cpu_clk != 0)
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return 0;
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else
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@ -139,6 +148,13 @@ ulong get_ddr_freq(ulong dummy)
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return gd->mem_clk;
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}
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#ifdef CONFIG_FSL_ESDHC
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int get_sdhc_freq(ulong dummy)
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{
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return gd->arch.sdhc_clk;
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}
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#endif
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int get_serial_clock(void)
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{
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return gd->bus_clk;
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@ -149,6 +165,10 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
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switch (clk) {
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case MXC_I2C_CLK:
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return get_bus_freq(0);
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#if defined(CONFIG_FSL_ESDHC)
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case MXC_ESDHC_CLK:
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return get_sdhc_freq(0);
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#endif
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case MXC_DSPI_CLK:
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return get_bus_freq(0);
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case MXC_UART_CLK:
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@ -12,6 +12,7 @@
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#include <asm/arch/soc.h>
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#include <hwconfig.h>
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#include <ahci.h>
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#include <mmc.h>
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#include <scsi.h>
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#include <fm_eth.h>
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#include <fsl_csu.h>
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@ -106,7 +106,7 @@ static uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)
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xfertyp |= XFERTYP_RSPTYP_48;
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#if defined(CONFIG_MX53) || defined(CONFIG_PPC_T4240) || \
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defined(CONFIG_LS102XA) || defined(CONFIG_LS2085A)
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defined(CONFIG_LS102XA) || defined(CONFIG_FSL_LAYERSCAPE)
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if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
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xfertyp |= XFERTYP_CMDTYP_ABORT;
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#endif
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@ -184,7 +184,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
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int timeout;
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struct fsl_esdhc_cfg *cfg = mmc->priv;
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struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
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#ifdef CONFIG_LS2085A
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#ifdef CONFIG_FSL_LAYERSCAPE
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dma_addr_t addr;
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#endif
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uint wml_value;
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@ -197,7 +197,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
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esdhc_clrsetbits32(®s->wml, WML_RD_WML_MASK, wml_value);
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#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
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#ifdef CONFIG_LS2085A
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#ifdef CONFIG_FSL_LAYERSCAPE
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addr = virt_to_phys((void *)(data->dest));
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if (upper_32_bits(addr))
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printf("Error found for upper 32 bits\n");
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@ -223,7 +223,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
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esdhc_clrsetbits32(®s->wml, WML_WR_WML_MASK,
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wml_value << 16);
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#ifndef CONFIG_SYS_FSL_ESDHC_USE_PIO
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#ifdef CONFIG_LS2085A
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#ifdef CONFIG_FSL_LAYERSCAPE
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addr = virt_to_phys((void *)(data->src));
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if (upper_32_bits(addr))
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printf("Error found for upper 32 bits\n");
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@ -277,7 +277,7 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data)
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static void check_and_invalidate_dcache_range
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(struct mmc_cmd *cmd,
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struct mmc_data *data) {
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#ifdef CONFIG_LS2085A
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#ifdef CONFIG_FSL_LAYERSCAPE
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unsigned start = 0;
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#else
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unsigned start = (unsigned)data->dest ;
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@ -285,7 +285,7 @@ static void check_and_invalidate_dcache_range
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unsigned size = roundup(ARCH_DMA_MINALIGN,
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data->blocks*data->blocksize);
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unsigned end = start+size ;
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#ifdef CONFIG_LS2085A
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#ifdef CONFIG_FSL_LAYERSCAPE
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dma_addr_t addr;
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addr = virt_to_phys((void *)(data->dest));
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@ -153,6 +153,17 @@
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#define CONFIG_CMD_ENV
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#define CONFIG_CMD_PING
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/* MMC */
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#define CONFIG_MMC
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#ifdef CONFIG_MMC
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_FAT
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#define CONFIG_FSL_ESDHC
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#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
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#define CONFIG_GENERIC_MMC
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#define CONFIG_DOS_PARTITION
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#endif
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/* FMan ucode */
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#define CONFIG_SYS_DPAA_FMAN
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#ifdef CONFIG_SYS_DPAA_FMAN
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@ -166,7 +166,7 @@
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#define ESDHC_VENDORSPEC_VSELECT 0x00000002 /* Use 1.8V */
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struct fsl_esdhc_cfg {
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#ifdef CONFIG_LS2085A
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#ifdef CONFIG_FSL_LAYERSCAPE
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u64 esdhc_base;
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#else
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u32 esdhc_base;
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