watchdog: designware: Migrate CONFIG_DESIGNWARE_WATCHDOG to Kconfig

Migrate CONFIG_DESIGNWARE_WATCHDOG to Kconfig and update the headers
accordingly, no functional change. The S10 enables the WDT only in
SPL, but does not enable it in U-Boot itself, hence disable it in
the config again.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Philipp Tomisch <philipp.tomisch@theobroma-systems.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>

include/configs/socfpga_common.h

@@ -104,11 +104,8 @@
 /*
  * L4 Watchdog
  */
-#ifdef CONFIG_HW_WATCHDOG
-#define CONFIG_DESIGNWARE_WATCHDOG
 #define CONFIG_DW_WDT_BASE		SOCFPGA_L4WD0_ADDRESS
 #define CONFIG_DW_WDT_CLOCK_KHZ		25000
-#endif
 
 /*
  * MMC Driver

include/configs/socfpga_soc64_common.h

@@ -152,7 +152,10 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
  */
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_HW_WATCHDOG
-#define CONFIG_DESIGNWARE_WATCHDOG
+#else
+#undef CONFIG_HW_WATCHDOG
+#undef CONFIG_DESIGNWARE_WATCHDOG
+#endif
 #define CONFIG_DW_WDT_BASE		SOCFPGA_L4WD0_ADDRESS
 #ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
 #ifndef __ASSEMBLY__
@@ -162,7 +165,6 @@ unsigned int cm_get_l4_sys_free_clk_hz(void);
 #else
 #define CONFIG_DW_WDT_CLOCK_KHZ		100000
 #endif
-#endif
 
 /*
  * SPL memory layout