leandrof/u-boot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

First set of u-boot-at91 features for the 2022.07 cycle

Browse Source 
-----BEGIN PGP SIGNATURE-----
 
 iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAmJH28ocHGV1Z2VuLmhy
 aXN0ZXZAbWljcm9jaGlwLmNvbQAKCRAesx4CDqwvyDv4B/9FBx95f7zR6WmguG05
 VyBchjphsRSuXHb7NieVNNEIpCJu+zw8YutngN2Q8KWIbM9o1OZnrNGxuKR9s+Px
 ivMXytGGsIa74XXhxv2boX151R1a5TG4UPf4Vn20qxmUiScE4FaoW5wQHG2vGqxd
 /LbzENNCA1A41/RGGysqyY8nQgOEY+Iass+OaHe7XjngcCfY5oY4IRqJ/Ak7ojkv
 Vm46i+KCTuyBlcMDjAwDsukSmzsujz2FyzZU1Uy62N8quEdXgrlIA/Yh4oarZ+BO
 5W/BJe1rClbnBkMJJn71GUlmnYrioYeUvxvIYwZWooe0Hgr+Iv1vOXv8aJ4hBsdc
 yoje
 =SwGu
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-at91-2022.07-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next

First set of u-boot-at91 features for the 2022.07 cycle:

This feature set includes the new driver for the Atmel TCB timer,
alignment in DT for sama7g5 and sama7g5ek board, one Kconfig conversion
for external reset, and the usage of Galois tables from ROM for sama5d2
device.
This commit is contained in:
Tom Rini 2022-04-04 08:26:55 -04:00
commit 8221c52d88
27 changed files with 1883 additions and 463 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
MAINTAINERS
View File

@ -352,6 +352,7 @@ F: arch/arm/mach-at91/
F: board/atmel/
F: drivers/cpu/at91_cpu.c
F: drivers/misc/microchip_flexcom.c
F: drivers/timer/atmel_tcb_timer.c
F: include/dt-bindings/mfd/atmel-flexcom.h
F: drivers/timer/mchp-pit64b-timer.c

2
arch/arm/dts/Makefile
View File

@ -1046,7 +1046,7 @@ dtb-$(CONFIG_TARGET_OMAP5_UEVM) += \
omap5-uevm.dtb
dtb-$(CONFIG_TARGET_SAMA7G5EK) += \
sama7g5ek.dtb
at91-sama7g5ek.dtb
dtb-$(CONFIG_TARGET_SAMA5D2_PTC_EK) += \
at91-sama5d2_ptc_ek.dtb

27
arch/arm/dts/sama7g5ek-u-boot.dtsi → arch/arm/dts/at91-sama7g5ek-u-boot.dtsi
View File

@ -1,11 +1,12 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* sama7g5ek-u-boot.dts - Device Tree file for SAMA7G5 SoC u-boot properties.
* at91-sama7g5ek-u-boot.dtsi - Device Tree file for SAMA7G5 SoC u-boot
* properties.
*
* Copyright (C) 2020 Microchip Technology Inc. and its subsidiaries
* Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries
*
* Author: Eugen Hristev <eugen.hristev@microchip.com>
* Author: Claudiu Beznea <claudiu.beznea@microchip.com>
* Author: Eugen Hristev <eugen.hristev@microchip.com>
* Author: Claudiu Beznea <claudiu.beznea@microchip.com>
*
*/
@ -14,12 +15,8 @@
u-boot,dm-pre-reloc;
};
ahb {
soc {
u-boot,dm-pre-reloc;
apb {
u-boot,dm-pre-reloc;
};
};
};
@ -31,18 +28,18 @@
u-boot,dm-pre-reloc;
};
&pioA {
&pinctrl {
u-boot,dm-pre-reloc;
pinctrl {
u-boot,dm-pre-reloc;
};
};
&pinctrl_flx3_default {
u-boot,dm-pre-reloc;
};
&pioA {
u-boot,dm-pre-reloc;
};
&pit64b0 {
u-boot,dm-pre-reloc;
};
@ -59,7 +56,7 @@
u-boot,dm-pre-reloc;
};
&uart0 {
&uart3 {
u-boot,dm-pre-reloc;
};

804
arch/arm/dts/at91-sama7g5ek.dts Normal file
View File

@ -0,0 +1,804 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* at91-sama7g5ek.dts - Device Tree file for SAMA7G5-EK board
*
* Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries
*
* Author: Eugen Hristev <eugen.hristev@microchip.com>
* Author: Claudiu Beznea <claudiu.beznea@microchip.com>
*
*/
/dts-v1/;
#include "sama7g5-pinfunc.h"
#include "sama7g5.dtsi"
#include <dt-bindings/mfd/atmel-flexcom.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/at91.h>
/ {
model = "Microchip SAMA7G5-EK";
compatible = "microchip,sama7g5ek", "microchip,sama7g5", "microchip,sama7";
chosen {
bootargs = "rw root=/dev/mmcblk1p2 rootfstype=ext4 rootwait";
stdout-path = "serial0:115200n8";
};
aliases {
serial0 = &uart3;
serial1 = &uart4;
serial2 = &uart7;
serial3 = &uart0;
i2c0 = &i2c1;
i2c1 = &i2c8;
i2c2 = &i2c9;
};
clocks {
slow_xtal {
clock-frequency = <32768>;
};
main_xtal {
clock-frequency = <24000000>;
};
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_key_gpio_default>;
bp1 {
label = "PB_USER";
gpios = <&pioA PIN_PA12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_PROG1>;
wakeup-source;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led_gpio_default>;
status = "okay"; /* Conflict with pwm. */
red_led {
label = "red";
gpios = <&pioA PIN_PB8 GPIO_ACTIVE_HIGH>;
};
green_led {
label = "green";
gpios = <&pioA PIN_PA13 GPIO_ACTIVE_HIGH>;
};
blue_led {
label = "blue";
gpios = <&pioA PIN_PD20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
/* 512 M */
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x20000000>;
};
sound: sound {
compatible = "simple-audio-card";
simple-audio-card,name = "sama7g5ek audio";
#address-cells = <1>;
#size-cells = <0>;
simple-audio-card,dai-link@0 {
reg = <0>;
cpu {
sound-dai = <&spdiftx>;
};
codec {
sound-dai = <&spdif_out>;
};
};
simple-audio-card,dai-link@1 {
reg = <1>;
cpu {
sound-dai = <&spdifrx>;
};
codec {
sound-dai = <&spdif_in>;
};
};
};
spdif_in: spdif-in {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dir";
};
spdif_out: spdif-out {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
};
};
&adc {
vddana-supply = <&vddout25>;
vref-supply = <&vddout25>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mikrobus1_an_default &pinctrl_mikrobus2_an_default>;
status = "okay";
};
&can0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can0_default>;
status = "okay";
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1_default>;
status = "okay";
};
&cpu0 {
cpu-supply = <&vddcpu>;
};
&qspi0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <133000000>;
spi-tx-bus-width = <8>;
spi-rx-bus-width = <8>;
m25p,fast-read;
at91bootstrap@0 {
label = "ospi: at91bootstrap";
reg = <0x0 0x40000>;
};
bootloader@40000 {
label = "ospi: bootloader";
reg = <0x40000 0xc0000>;
};
bootloaderenvred@100000 {
label = "ospi: bootloader env redundant";
reg = <0x100000 0x40000>;
};
bootloaderenv@140000 {
label = "ospi: bootloader env";
reg = <0x140000 0x40000>;
};
dtb@180000 {
label = "ospi: device tree";
reg = <0x180000 0x80000>;
};
kernel@200000 {
label = "ospi: kernel";
reg = <0x200000 0x600000>;
};
rootfs@800000 {
label = "ospi: rootfs";
reg = <0x800000 0x7800000>;
};
};
};
&dma0 {
status = "okay";
};
&dma1 {
status = "okay";
};
&dma2 {
status = "okay";
};
&flx0 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
status = "disabled";
uart0: serial@200 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx0_default>;
status = "disabled";
};
};
&flx1 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
status = "okay";
i2c1: i2c@600 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_default>;
i2c-analog-filter;
i2c-digital-filter;
i2c-digital-filter-width-ns = <35>;
status = "okay";
mcp16502@5b {
compatible = "microchip,mcp16502";
reg = <0x5b>;
status = "okay";
regulators {
vdd_3v3: VDD_IO {
regulator-name = "VDD_IO";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3700000>;
regulator-initial-mode = <2>;
regulator-allowed-modes = <2>, <4>;
regulator-always-on;
regulator-state-standby {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
regulator-mode = <4>;
};
regulator-state-mem {
regulator-off-in-suspend;
regulator-mode = <4>;
};
};
vddioddr: VDD_DDR {
regulator-name = "VDD_DDR";
regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1450000>;
regulator-initial-mode = <2>;
regulator-allowed-modes = <2>, <4>;
regulator-always-on;
regulator-state-standby {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1350000>;
regulator-mode = <4>;
};
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1350000>;
regulator-mode = <4>;
};
};
vddcore: VDD_CORE {
regulator-name = "VDD_CORE";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1850000>;
regulator-initial-mode = <2>;
regulator-allowed-modes = <2>, <4>;
regulator-always-on;
regulator-state-standby {
regulator-on-in-suspend;
regulator-suspend-voltage = <1150000>;
regulator-mode = <4>;
};
regulator-state-mem {
regulator-off-in-suspend;
regulator-mode = <4>;
};
};
vddcpu: VDD_OTHER {
regulator-name = "VDD_OTHER";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1850000>;
regulator-initial-mode = <2>;
regulator-allowed-modes = <2>, <4>;
regulator-ramp-delay = <3125>;
regulator-always-on;
regulator-state-standby {
regulator-on-in-suspend;
regulator-suspend-voltage = <1050000>;
regulator-mode = <4>;
};
regulator-state-mem {
regulator-off-in-suspend;
regulator-mode = <4>;
};
};
vldo1: LDO1 {
regulator-name = "LDO1";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3700000>;
regulator-always-on;
regulator-state-standby {
regulator-suspend-voltage = <1800000>;
regulator-on-in-suspend;
};
regulator-state-mem {
regulator-off-in-suspend;
};
};
vldo2: LDO2 {
regulator-name = "LDO2";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <3700000>;
regulator-state-standby {
regulator-suspend-voltage = <1800000>;
regulator-on-in-suspend;
};
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
};
&flx3 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
status = "okay";
uart3: serial@200 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx3_default>;
status = "okay";
};
};
&flx4 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
status = "okay";
uart4: serial@200 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx4_default>;
status = "okay";
};
};
&flx7 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
status = "okay";
uart7: serial@200 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx7_default>;
status = "okay";
};
};
&flx8 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
status = "okay";
i2c8: i2c@600 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c8_default>;
i2c-analog-filter;
i2c-digital-filter;
i2c-digital-filter-width-ns = <35>;
status = "okay";
eeprom@52 {
compatible = "microchip,24aa02e48";
reg = <0x52>;
pagesize = <16>;
};
eeprom@53 {
compatible = "microchip,24aa02e48";
reg = <0x53>;
pagesize = <16>;
};
};
};
&flx9 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
status = "okay";
i2c9: i2c@600 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c9_default>;
i2c-analog-filter;
i2c-digital-filter;
i2c-digital-filter-width-ns = <35>;
status = "okay";
};
};
&flx11 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_SPI>;
status = "okay";
spi11: spi@400 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mikrobus1_spi &pinctrl_mikrobus1_spi_cs>;
status = "okay";
};
};
&gmac0 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0_default
&pinctrl_gmac0_mdio_default
&pinctrl_gmac0_txck_default
&pinctrl_gmac0_phy_irq>;
phy-mode = "rgmii-id";
status = "okay";
ethernet-phy@7 {
reg = <0x7>;
interrupt-parent = <&pioA>;
interrupts = <PIN_PA31 IRQ_TYPE_LEVEL_LOW>;
};
};
&gmac1 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac1_default
&pinctrl_gmac1_mdio_default
&pinctrl_gmac1_phy_irq>;
phy-mode = "rmii";
status = "okay";
ethernet-phy@0 {
reg = <0x0>;
interrupt-parent = <&pioA>;
interrupts = <PIN_PA21 IRQ_TYPE_LEVEL_LOW>;
};
};
&i2s0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2s0_default>;
};
&pioA {
pinctrl_can0_default: can0_default {
pinmux = <PIN_PD12__CANTX0>,
<PIN_PD13__CANRX0 >;
bias-disable;
};
pinctrl_can1_default: can1_default {
pinmux = <PIN_PD14__CANTX1>,
<PIN_PD15__CANRX1 >;
bias-disable;
};
pinctrl_flx0_default: flx0_default {
pinmux = <PIN_PE3__FLEXCOM0_IO0>,
<PIN_PE4__FLEXCOM0_IO1>,
<PIN_PE6__FLEXCOM0_IO3>,
<PIN_PE7__FLEXCOM0_IO4>;
bias-disable;
};
pinctrl_flx3_default: flx3_default {
pinmux = <PIN_PD16__FLEXCOM3_IO0>,
<PIN_PD17__FLEXCOM3_IO1>;
bias-pull-up;
};
pinctrl_flx4_default: flx4_default {
pinmux = <PIN_PD18__FLEXCOM4_IO0>,
<PIN_PD19__FLEXCOM4_IO1>;
bias-disable;
};
pinctrl_flx7_default: flx7_default {
pinmux = <PIN_PC23__FLEXCOM7_IO0>,
<PIN_PC24__FLEXCOM7_IO1>;
bias-disable;
};
pinctrl_gmac0_default: gmac0_default {
pinmux = <PIN_PA16__G0_TX0>,
<PIN_PA17__G0_TX1>,
<PIN_PA26__G0_TX2>,
<PIN_PA27__G0_TX3>,
<PIN_PA19__G0_RX0>,
<PIN_PA20__G0_RX1>,
<PIN_PA28__G0_RX2>,
<PIN_PA29__G0_RX3>,
<PIN_PA15__G0_TXEN>,
<PIN_PA30__G0_RXCK>,
<PIN_PA18__G0_RXDV>,
<PIN_PA25__G0_125CK>;
slew-rate = <0>;
bias-disable;
};
pinctrl_gmac0_mdio_default: gmac0_mdio_default {
pinmux = <PIN_PA22__G0_MDC>,
<PIN_PA23__G0_MDIO>;
bias-disable;
};
pinctrl_gmac0_txck_default: gmac0_txck_default {
pinmux = <PIN_PA24__G0_TXCK>;
slew-rate = <0>;
bias-pull-up;
};
pinctrl_gmac0_phy_irq: gmac0_phy_irq {
pinmux = <PIN_PA31__GPIO>;
bias-disable;
};
pinctrl_gmac1_default: gmac1_default {
pinmux = <PIN_PD30__G1_TXCK>,
<PIN_PD22__G1_TX0>,
<PIN_PD23__G1_TX1>,
<PIN_PD21__G1_TXEN>,
<PIN_PD25__G1_RX0>,
<PIN_PD26__G1_RX1>,
<PIN_PD27__G1_RXER>,
<PIN_PD24__G1_RXDV>;
slew-rate = <0>;
bias-disable;
};
pinctrl_gmac1_mdio_default: gmac1_mdio_default {
pinmux = <PIN_PD28__G1_MDC>,
<PIN_PD29__G1_MDIO>;
bias-disable;
};
pinctrl_gmac1_phy_irq: gmac1_phy_irq {
pinmux = <PIN_PA21__GPIO>;
bias-disable;
};
pinctrl_i2c1_default: i2c1_default {
pinmux = <PIN_PC9__FLEXCOM1_IO0>,
<PIN_PC10__FLEXCOM1_IO1>;
bias-disable;
};
pinctrl_i2c8_default: i2c8_default {
pinmux = <PIN_PC14__FLEXCOM8_IO0>,
<PIN_PC13__FLEXCOM8_IO1>;
bias-disable;
};
pinctrl_i2c9_default: i2c9_default {
pinmux = <PIN_PC18__FLEXCOM9_IO0>,
<PIN_PC19__FLEXCOM9_IO1>;
bias-disable;
};
pinctrl_i2s0_default: i2s0_default {
pinmux = <PIN_PB23__I2SMCC0_CK>,
<PIN_PB24__I2SMCC0_WS>,
<PIN_PB25__I2SMCC0_DOUT1>,
<PIN_PB26__I2SMCC0_DOUT0>,
<PIN_PB27__I2SMCC0_MCK>;
bias-disable;
};
pinctrl_key_gpio_default: key_gpio_default {
pinmux = <PIN_PA12__GPIO>;
bias-pull-up;
};
pinctrl_led_gpio_default: led_gpio_default {
pinmux = <PIN_PA13__GPIO>,
<PIN_PB8__GPIO>,
<PIN_PD20__GPIO>;
bias-pull-up;
};
pinctrl_mikrobus1_an_default: mikrobus1_an_default {
pinmux = <PIN_PD0__GPIO>;
bias-disable;
};
pinctrl_mikrobus2_an_default: mikrobus2_an_default {
pinmux = <PIN_PD1__GPIO>;
bias-disable;
};
pinctrl_mikrobus1_pwm2_default: mikrobus1_pwm2_default {
pinmux = <PIN_PA13__PWMH2>;
bias-disable;
};
pinctrl_mikrobus2_pwm3_default: mikrobus2_pwm3_default {
pinmux = <PIN_PD20__PWMH3>;
bias-disable;
};
pinctrl_mikrobus1_spi_cs: mikrobus1_spi_cs {
pinmux = <PIN_PB6__FLEXCOM11_IO3>;
bias-disable;
};
pinctrl_mikrobus1_spi: mikrobus1_spi {
pinmux = <PIN_PB3__FLEXCOM11_IO0>,
<PIN_PB4__FLEXCOM11_IO1>,
<PIN_PB5__FLEXCOM11_IO2>;
bias-disable;
};
pinctrl_qspi: qspi {
pinmux = <PIN_PB12__QSPI0_IO0>,
<PIN_PB11__QSPI0_IO1>,
<PIN_PB10__QSPI0_IO2>,
<PIN_PB9__QSPI0_IO3>,
<PIN_PB16__QSPI0_IO4>,
<PIN_PB17__QSPI0_IO5>,
<PIN_PB18__QSPI0_IO6>,
<PIN_PB19__QSPI0_IO7>,
<PIN_PB13__QSPI0_CS>,
<PIN_PB14__QSPI0_SCK>,
<PIN_PB15__QSPI0_SCKN>,
<PIN_PB20__QSPI0_DQS>,
<PIN_PB21__QSPI0_INT>;
bias-disable;
slew-rate = <0>;
atmel,drive-strength = <ATMEL_PIO_DRVSTR_HI>;
};
pinctrl_sdmmc0_default: sdmmc0_default {
pinmux = <PIN_PA1__SDMMC0_CMD>,
<PIN_PA3__SDMMC0_DAT0>,
<PIN_PA4__SDMMC0_DAT1>,
<PIN_PA5__SDMMC0_DAT2>,
<PIN_PA6__SDMMC0_DAT3>,
<PIN_PA7__SDMMC0_DAT4>,
<PIN_PA8__SDMMC0_DAT5>,
<PIN_PA9__SDMMC0_DAT6>,
<PIN_PA10__SDMMC0_DAT7>,
<PIN_PA0__SDMMC0_CK>,
<PIN_PA2__SDMMC0_RSTN>,
<PIN_PA14__SDMMC0_CD>,
<PIN_PA11__SDMMC0_DS>;
slew-rate = <0>;
bias-pull-up;
};
pinctrl_sdmmc1_default: sdmmc1_default {
pinmux = <PIN_PB29__SDMMC1_CMD>,
<PIN_PB31__SDMMC1_DAT0>,
<PIN_PC0__SDMMC1_DAT1>,
<PIN_PC1__SDMMC1_DAT2>,
<PIN_PC2__SDMMC1_DAT3>,
<PIN_PB30__SDMMC1_CK>,
<PIN_PB28__SDMMC1_RSTN>,
<PIN_PC5__SDMMC1_1V8SEL>,
<PIN_PC4__SDMMC1_CD>;
slew-rate = <0>;
bias-pull-up;
};
pinctrl_sdmmc2_default: sdmmc2_default {
pinmux = <PIN_PD3__SDMMC2_CMD>,
<PIN_PD5__SDMMC2_DAT0>,
<PIN_PD6__SDMMC2_DAT1>,
<PIN_PD7__SDMMC2_DAT2>,
<PIN_PD8__SDMMC2_DAT3>,
<PIN_PD4__SDMMC2_CK>;
slew-rate = <0>;
bias-pull-up;
};
pinctrl_spdifrx_default: spdifrx_default {
pinmux = <PIN_PB0__SPDIF_RX>;
bias-disable;
};
pinctrl_spdiftx_default: spdiftx_default {
pinmux = <PIN_PB1__SPDIF_TX>;
bias-disable;
};
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mikrobus1_pwm2_default &pinctrl_mikrobus2_pwm3_default>;
status = "disabled"; /* Conflict with leds. */
};
&rtt {
atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
};
&sdmmc0 {
bus-width = <8>;
non-removable;
no-1-8-v;
sdhci-caps-mask = <0x0 0x00200000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc0_default>;
status = "okay";
};
&sdmmc1 {
bus-width = <4>;
no-1-8-v;
sdhci-caps-mask = <0x0 0x00200000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_default>;
status = "okay";
};
&sdmmc2 {
bus-width = <4>;
no-1-8-v;
sdhci-caps-mask = <0x0 0x00200000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc2_default>;
};
&shdwc {
atmel,shdwc-debouncer = <976>;
status = "okay";
input@0 {
reg = <0>;
};
};
&spdifrx {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spdifrx_default>;
status = "okay";
};
&spdiftx {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spdiftx_default>;
status = "okay";
};
&tcb0 {
timer0: timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>;
};
timer1: timer@1 {
compatible = "atmel,tcb-timer";
reg = <1>;
};
};
&trng {
status = "okay";
};
&vddout25 {
vin-supply = <&vdd_3v3>;
status = "okay";
};

28
arch/arm/dts/sama5d2.dtsi
View File

@ -1,8 +1,10 @@
#include "skeleton.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Atmel SAMA5D2 family SoC";
compatible = "atmel,sama5d2";
interrupt-parent = <&aic>;
aliases {
spi0 = &spi0;
@ -361,6 +363,7 @@
#clock-cells = <0>;
reg = <35>;
atmel,clk-output-range = <0 83000000>;
u-boot,dm-pre-reloc;
};
tcb1_clk: tcb1_clk@36 {
@ -638,6 +641,23 @@
status = "disabled";
};
tcb0: timer@f800c000 {
compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
reg = <0xf800c000 0x100>;
interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&tcb0_clk>, <&tcb0_gclk>, <&clk32k>;
clock-names = "t0_clk", "gclk", "slow_clk";
#address-cells = <1>;
#size-cells = <0>;
u-boot,dm-pre-reloc;
timer0: timer@0 {
compatible = "atmel,tcb-timer";
reg = <0>, <1>;
u-boot,dm-pre-reloc;
};
};
uart0: serial@f801c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf801c000 0x100>;
@ -762,6 +782,14 @@
status = "disabled";
};
aic: interrupt-controller@fc020000 {
#interrupt-cells = <3>;
compatible = "atmel,sama5d2-aic";
interrupt-controller;
reg = <0xfc020000 0x200>;
atmel,external-irqs = <49>;
};
i2c1: i2c@fc028000 {
compatible = "atmel,sama5d2-i2c";
reg = <0xfc028000 0x100>;

960
arch/arm/dts/sama7g5.dtsi
View File

File diff suppressed because it is too large Load Diff

275
arch/arm/dts/sama7g5ek.dts
View File

@ -1,275 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* sama7g5ek.dts - Device Tree file for SAMA7G5 EK
* SAMA7G5 Evaluation Kit
*
* Copyright (c) 2020, Microchip Technology Inc.
* 2020, Eugen Hristev <eugen.hristev@microchip.com>
* 2020, Claudiu Beznea <claudiu.beznea@microchip.com>
*/
/dts-v1/;
#include <dt-bindings/mfd/atmel-flexcom.h>
#include "sama7g5.dtsi"
#include "sama7g5-pinfunc.h"
#include <dt-bindings/pinctrl/at91.h>
/ {
model = "Microchip SAMA7G5 Evaluation Kit";
compatible = "microchip,sama7g5ek", "microchip,sama7g54", "microchip,sama7g5", "microchip,sama7";
aliases {
serial0 = &uart0;
i2c0 = &i2c1;
i2c1 = &i2c8;
};
chosen {
stdout-path = "serial0:115200n8";
};
clocks {
slow_xtal: slow_xtal {
clock-frequency = <32768>;
};
main_xtal: main_xtal {
clock-frequency = <24000000>;
};
};
ahb {
apb {
sdmmc0: sdio-host@e1204000 {
bus-width = <8>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc0_cmd_data_default
&pinctrl_sdmmc0_ck_rstn_ds_cd_default>;
status = "okay";
};
sdmmc1: sdio-host@e1208000 {
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_cmd_data_default
&pinctrl_sdmmc1_ck_cd_rstn_vddsel_default>;
status = "okay";
};
uart0: serial@e1824200 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx3_default>;
status = "okay";
};
};
};
};
&qspi0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi>;
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <133000000>;
spi-tx-bus-width = <8>;
spi-rx-bus-width = <8>;
m25p,fast-read;
};
};
&flx1 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
status = "okay";
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx1_default>;
status = "okay";
};
&flx8 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
status = "okay";
i2c8: i2c@600 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c8_default>;
i2c-analog-filter;
i2c-digital-filter;
i2c-digital-filter-width-ns = <35>;
status = "okay";
eeprom@52 {
compatible = "microchip,24aa02e48";
reg = <0x52>;
pagesize = <16>;
};
eeprom@53 {
compatible = "microchip,24aa02e48";
reg = <0x53>;
pagesize = <16>;
};
};
};
&gmac0 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac0_default
&pinctrl_gmac0_mdio_default
&pinctrl_gmac0_txc_default>;
phy-mode = "rgmii-id";
status = "okay";
ethernet-phy@7 {
reg = <0x7>;
};
};
&gmac1 {
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gmac1_default &pinctrl_gmac1_mdio_default>;
phy-mode = "rmii";
status = "okay";
ethernet-phy@0 {
reg = <0x0>;
};
};
&pinctrl {
pinctrl_flx1_default: flx1_default {
pinmux = <PIN_PC9__FLEXCOM1_IO0>,
<PIN_PC10__FLEXCOM1_IO1>;
bias-disable;
};
pinctrl_flx3_default: flx3_default {
pinmux = <PIN_PD16__FLEXCOM3_IO0>,
<PIN_PD17__FLEXCOM3_IO1>;
bias-pull-up;
};
pinctrl_i2c8_default: i2c8_default {
pinmux = <PIN_PC14__FLEXCOM8_IO0>,
<PIN_PC13__FLEXCOM8_IO1>;
bias-disable;
};
pinctrl_qspi: qspi {
pinmux = <PIN_PB12__QSPI0_IO0>,
<PIN_PB11__QSPI0_IO1>,
<PIN_PB10__QSPI0_IO2>,
<PIN_PB9__QSPI0_IO3>,
<PIN_PB16__QSPI0_IO4>,
<PIN_PB17__QSPI0_IO5>,
<PIN_PB18__QSPI0_IO6>,
<PIN_PB19__QSPI0_IO7>,
<PIN_PB13__QSPI0_CS>,
<PIN_PB14__QSPI0_SCK>,
<PIN_PB15__QSPI0_SCKN>,
<PIN_PB20__QSPI0_DQS>,
<PIN_PB21__QSPI0_INT>;
bias-disable;
slew-rate = <0>;
atmel,drive-strength = <ATMEL_PIO_DRVSTR_HI>;
};
pinctrl_sdmmc0_cmd_data_default: sdmmc0_cmd_data_default {
pinmux = <PIN_PA1__SDMMC0_CMD>,
<PIN_PA3__SDMMC0_DAT0>,
<PIN_PA4__SDMMC0_DAT1>,
<PIN_PA5__SDMMC0_DAT2>,
<PIN_PA6__SDMMC0_DAT3>,
<PIN_PA7__SDMMC0_DAT4>,
<PIN_PA8__SDMMC0_DAT5>,
<PIN_PA9__SDMMC0_DAT6>,
<PIN_PA10__SDMMC0_DAT7>;
bias-pull-up;
};
pinctrl_sdmmc0_ck_rstn_ds_cd_default: sdmmc0_ck_rstn_ds_cd_default {
pinmux = <PIN_PA0__SDMMC0_CK>,
<PIN_PA2__SDMMC0_RSTN>,
<PIN_PA11__SDMMC0_DS>,
<PIN_PA14__SDMMC0_CD>;
bias-pull-up;
};
pinctrl_sdmmc1_cmd_data_default: sdmmc1_cmd_data_default {
pinmux = <PIN_PB29__SDMMC1_CMD>,
<PIN_PB31__SDMMC1_DAT0>,
<PIN_PC0__SDMMC1_DAT1>,
<PIN_PC1__SDMMC1_DAT2>,
<PIN_PC2__SDMMC1_DAT3>;
bias-pull-up;
};
pinctrl_sdmmc1_ck_cd_rstn_vddsel_default: sdmmc1_ck_cd_rstn_vddsel_default {
pinmux = <PIN_PB30__SDMMC1_CK>,
<PIN_PB28__SDMMC1_RSTN>,
<PIN_PC5__SDMMC1_1V8SEL>,
<PIN_PC4__SDMMC1_CD>;
bias-pull-up;
};
pinctrl_gmac0_default: gmac0_default {
pinmux = <PIN_PA16__G0_TX0>,
<PIN_PA17__G0_TX1>,
<PIN_PA26__G0_TX2>,
<PIN_PA27__G0_TX3>,
<PIN_PA19__G0_RX0>,
<PIN_PA20__G0_RX1>,
<PIN_PA28__G0_RX2>,
<PIN_PA29__G0_RX3>,
<PIN_PA15__G0_TXEN>,
<PIN_PA30__G0_RXCK>,
<PIN_PA18__G0_RXDV>,
<PIN_PA25__G0_125CK>;
slew-rate = <0>;
bias-disable;
};
pinctrl_gmac0_mdio_default: gmac0_mdio_default {
pinmux = <PIN_PA22__G0_MDC>,
<PIN_PA23__G0_MDIO>;
bias-disable;
};
pinctrl_gmac0_txc_default: gmac0_txc_default {
pinmux = <PIN_PA24__G0_TXCK>;
slew-rate = <0>;
bias-pull-up;
};
pinctrl_gmac1_default: gmac1_default {
pinmux = <PIN_PD30__G1_TXCK>,
<PIN_PD22__G1_TX0>,
<PIN_PD23__G1_TX1>,
<PIN_PD21__G1_TXEN>,
<PIN_PD25__G1_RX0>,
<PIN_PD26__G1_RX1>,
<PIN_PD27__G1_RXER>,
<PIN_PD24__G1_RXDV>;
slew-rate = <0>;
bias-disable;
};
pinctrl_gmac1_mdio_default: gmac1_mdio_default {
pinmux = <PIN_PD28__G1_MDC>,
<PIN_PD29__G1_MDIO>;
bias-disable;
};
};

4
arch/arm/mach-at91/Kconfig
View File

@ -50,6 +50,7 @@ config SAM9X60
config SAMA7G5
bool
select CPU_V7A
select AT91RESET_EXTRST
config SAMA5D2
bool
@ -306,6 +307,9 @@ endchoice
config ATMEL_SFR
bool
config AT91RESET_EXTRST
bool
config SYS_SOC
default "at91"

2
arch/arm/mach-at91/armv7/Makefile
View File

@ -14,9 +14,11 @@ obj-y += cpu.o
ifndef CONFIG_$(SPL_TPL_)SYSRESET
obj-y += reset.o
endif
ifneq ($(CONFIG_ATMEL_TCB_TIMER),y)
ifneq ($(CONFIG_ATMEL_PIT_TIMER),y)
ifneq ($(CONFIG_MCHP_PIT64B_TIMER),y)
# old non-DM timer driver
obj-y += timer.o
endif
endif
endif

10
arch/arm/mach-at91/include/mach/sama5d2.h
View File

@ -129,6 +129,7 @@
/*
* Address Memory Space
*/
#define ATMEL_BASE_ROM 0x00000000
#define ATMEL_BASE_CS0 0x10000000
#define ATMEL_BASE_DDRCS 0x20000000
#define ATMEL_BASE_CS1 0x60000000
@ -141,6 +142,12 @@
#define ATMEL_BASE_QSPI0_MEM 0xd0000000
#define ATMEL_BASE_QSPI1_MEM 0xd8000000
/*
* PMECC tables in ROM
*/
#define ATMEL_PMECC_INDEX_OFFSET_512 0x40000
#define ATMEL_PMECC_INDEX_OFFSET_1024 0x48000
/*
* Internal Memories
*/
@ -233,9 +240,6 @@
/* PIT Timer(PIT_PIIR) */
#define CONFIG_SYS_TIMER_COUNTER 0xf804803c
/* No PMECC Galois table in ROM */
#define NO_GALOIS_TABLE_IN_ROM
#ifndef __ASSEMBLY__
unsigned int get_chip_id(void);
unsigned int get_extension_chip_id(void);

9
board/atmel/sama5d27_som1_ek/sama5d27_som1_ek.c
View File

@ -22,6 +22,13 @@ extern void at91_pda_detect(void);
DECLARE_GLOBAL_DATA_PTR;
static void rgb_leds_init(void)
{
atmel_pio4_set_pio_output(AT91_PIO_PORTA, 10, 0); /* LED RED */
atmel_pio4_set_pio_output(AT91_PIO_PORTB, 1, 0); /* LED GREEN */
atmel_pio4_set_pio_output(AT91_PIO_PORTA, 31, 1); /* LED BLUE */
}
#ifdef CONFIG_CMD_USB
static void board_usb_hw_init(void)
{
@ -71,6 +78,8 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
rgb_leds_init();
#ifdef CONFIG_CMD_USB
board_usb_hw_init();
#endif

9
board/atmel/sama5d27_wlsom1_ek/sama5d27_wlsom1_ek.c
View File

@ -22,6 +22,13 @@ extern void at91_pda_detect(void);
DECLARE_GLOBAL_DATA_PTR;
static void rgb_leds_init(void)
{
atmel_pio4_set_pio_output(AT91_PIO_PORTA, 6, 0); /* LED RED */
atmel_pio4_set_pio_output(AT91_PIO_PORTA, 7, 0); /* LED GREEN */
atmel_pio4_set_pio_output(AT91_PIO_PORTA, 8, 1); /* LED BLUE */
}
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
@ -64,6 +71,8 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
rgb_leds_init();
return 0;
}

9
board/atmel/sama5d2_icp/sama5d2_icp.c
View File

@ -19,6 +19,13 @@
DECLARE_GLOBAL_DATA_PTR;
static void rgb_leds_init(void)
{
atmel_pio4_set_pio_output(AT91_PIO_PORTB, 0, 0); /* LED RED */
atmel_pio4_set_pio_output(AT91_PIO_PORTB, 1, 0); /* LED GREEN */
atmel_pio4_set_pio_output(AT91_PIO_PORTA, 31, 1); /* LED BLUE */
}
int board_late_init(void)
{
return 0;
@ -52,6 +59,8 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
rgb_leds_init();
return 0;
}

9
board/atmel/sama5d2_ptc_ek/sama5d2_ptc_ek.c
View File

@ -25,6 +25,13 @@ extern void at91_pda_detect(void);
DECLARE_GLOBAL_DATA_PTR;
static void rgb_leds_init(void)
{
atmel_pio4_set_pio_output(AT91_PIO_PORTB, 10, 0); /* LED RED */
atmel_pio4_set_pio_output(AT91_PIO_PORTB, 8, 0); /* LED GREEN */
atmel_pio4_set_pio_output(AT91_PIO_PORTB, 6, 1); /* LED BLUE */
}
#ifdef CONFIG_NAND_ATMEL
static void board_nand_hw_init(void)
{
@ -113,6 +120,8 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
rgb_leds_init();
#ifdef CONFIG_NAND_ATMEL
board_nand_hw_init();
#endif

9
board/atmel/sama5d2_xplained/sama5d2_xplained.c
View File

@ -21,6 +21,13 @@ extern void at91_pda_detect(void);
DECLARE_GLOBAL_DATA_PTR;
static void rgb_leds_init(void)
{
atmel_pio4_set_pio_output(AT91_PIO_PORTB, 6, 1); /* LED RED */
atmel_pio4_set_pio_output(AT91_PIO_PORTB, 5, 1); /* LED GREEN */
atmel_pio4_set_pio_output(AT91_PIO_PORTB, 0, 0); /* LED BLUE */
}
#ifdef CONFIG_CMD_USB
static void board_usb_hw_init(void)
{
@ -70,6 +77,8 @@ int board_init(void)
/* address of boot parameters */
gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
rgb_leds_init();
#ifdef CONFIG_CMD_USB
board_usb_hw_init();
#endif

2
configs/sama5d2_icp_mmc_defconfig
View File

@ -82,6 +82,6 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_ATMEL_TCB_TIMER=y
CONFIG_OF_LIBFDT_OVERLAY=y
# CONFIG_EFI_LOADER_HII is not set

2
configs/sama5d2_ptc_ek_mmc_defconfig
View File

@ -71,7 +71,7 @@ CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_ATMEL_TCB_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y

2
configs/sama5d2_ptc_ek_nandflash_defconfig
View File

@ -71,7 +71,7 @@ CONFIG_DM_SERIAL=y
CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_ATMEL_USART=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_ATMEL_TCB_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y

2
configs/sama5d2_xplained_emmc_defconfig
View File

@ -90,7 +90,7 @@ CONFIG_DM_SPI=y
CONFIG_ATMEL_QSPI=y
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_ATMEL_TCB_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y

2
configs/sama5d2_xplained_mmc_defconfig
View File

@ -92,7 +92,7 @@ CONFIG_DM_SPI=y
CONFIG_ATMEL_QSPI=y
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_ATMEL_TCB_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y

2
configs/sama5d2_xplained_qspiflash_defconfig
View File

@ -92,7 +92,7 @@ CONFIG_DM_SPI=y
CONFIG_ATMEL_QSPI=y
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_ATMEL_TCB_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y

2
configs/sama5d2_xplained_spiflash_defconfig
View File

@ -96,7 +96,7 @@ CONFIG_DM_SPI=y
CONFIG_ATMEL_QSPI=y
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
CONFIG_ATMEL_TCB_TIMER=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_STORAGE=y

2
configs/sama7g5ek_mmc1_defconfig
View File

@ -6,7 +6,7 @@ CONFIG_TARGET_SAMA7G5EK=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sama7g5ek"
CONFIG_DEFAULT_DEVICE_TREE="at91-sama7g5ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xe1824200
CONFIG_DEBUG_UART_CLOCK=200000000

2
configs/sama7g5ek_mmc_defconfig
View File

@ -6,7 +6,7 @@ CONFIG_TARGET_SAMA7G5EK=y
CONFIG_NR_DRAM_BANKS=1
CONFIG_ENV_SIZE=0x4000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="sama7g5ek"
CONFIG_DEFAULT_DEVICE_TREE="at91-sama7g5ek"
CONFIG_DEBUG_UART_BOARD_INIT=y
CONFIG_DEBUG_UART_BASE=0xe1824200
CONFIG_DEBUG_UART_CLOCK=200000000

8
drivers/timer/Kconfig
View File

@ -96,6 +96,14 @@ config ATMEL_PIT_TIMER
it is designed to offer maximum accuracy and efficient management,
even for systems with long response time.
config ATMEL_TCB_TIMER
bool "Atmel timer counter support"
depends on TIMER
depends on ARCH_AT91
help
Select this to enable the use of the timer counter as a monotonic
counter.
config CADENCE_TTC_TIMER
bool "Cadence TTC (Triple Timer Counter)"
depends on TIMER

1
drivers/timer/Makefile
View File

@ -10,6 +10,7 @@ obj-$(CONFIG_ARC_TIMER) += arc_timer.o
obj-$(CONFIG_AST_TIMER) += ast_timer.o
obj-$(CONFIG_ATCPIT100_TIMER) += atcpit100_timer.o
obj-$(CONFIG_ATMEL_PIT_TIMER) += atmel_pit_timer.o
obj-$(CONFIG_ATMEL_TCB_TIMER) += atmel_tcb_timer.o
obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence-ttc.o
obj-$(CONFIG_DESIGNWARE_APB_TIMER) += dw-apb-timer.o
obj-$(CONFIG_MPC83XX_TIMER) += mpc83xx_timer.o

161
drivers/timer/atmel_tcb_timer.c Normal file
View File

@ -0,0 +1,161 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2022 Microchip Corporation
*
* Author: Clément Léger <clement.leger@bootlin.com>
*/
#include <common.h>
#include <clk.h>
#include <dm.h>
#include <timer.h>
#include <asm/io.h>
#include <linux/bitops.h>
#define TCB_CHAN(chan) ((chan) * 0x40)
#define TCB_CCR(chan) (0x0 + TCB_CHAN(chan))
#define TCB_CCR_CLKEN (1 << 0)
#define TCB_CMR(chan) (0x4 + TCB_CHAN(chan))
#define TCB_CMR_WAVE (1 << 15)
#define TCB_CMR_TIMER_CLOCK2 1
#define TCB_CMR_XC1 6
#define TCB_CMR_ACPA_SET (1 << 16)
#define TCB_CMR_ACPC_CLEAR (2 << 18)
#define TCB_CV(chan) (0x10 + TCB_CHAN(chan))
#define TCB_RA(chan) (0x14 + TCB_CHAN(chan))
#define TCB_RC(chan) (0x1c + TCB_CHAN(chan))
#define TCB_IDR(chan) (0x28 + TCB_CHAN(chan))
#define TCB_BCR 0xc0
#define TCB_BCR_SYNC (1 << 0)
#define TCB_BMR 0xc4
#define TCB_BMR_TC1XC1S_TIOA0 (2 << 2)
#define TCB_WPMR 0xe4
#define TCB_WPMR_WAKEY 0x54494d
#define TCB_CLK_DIVISOR 8
struct atmel_tcb_plat {
void __iomem *base;
};
static u64 atmel_tcb_get_count(struct udevice *dev)
{
struct atmel_tcb_plat *plat = dev_get_plat(dev);
u64 cv0 = 0;
u64 cv1 = 0;
do {
cv1 = readl(plat->base + TCB_CV(1));
cv0 = readl(plat->base + TCB_CV(0));
} while (readl(plat->base + TCB_CV(1)) != cv1);
cv0 |= cv1 << 32;
return cv0;
}
static void atmel_tcb_configure(void __iomem *base)
{
/* Disable write protection */
writel(TCB_WPMR_WAKEY, base + TCB_WPMR);
/* Disable all irqs for both channel 0 & 1 */
writel(0xff, base + TCB_IDR(0));
writel(0xff, base + TCB_IDR(1));
/*
* In order to avoid wrapping, use a 64 bit counter by chaining
* two channels.
* Channel 0 is configured to generate a clock on TIOA0 which is cleared
* when reaching 0x80000000 and set when reaching 0.
*/
writel(TCB_CMR_TIMER_CLOCK2 | TCB_CMR_WAVE | TCB_CMR_ACPA_SET
| TCB_CMR_ACPC_CLEAR, base + TCB_CMR(0));
writel(0x80000000, base + TCB_RC(0));
writel(0x1, base + TCB_RA(0));
writel(TCB_CCR_CLKEN, base + TCB_CCR(0));
/* Channel 1 is configured to use TIOA0 as input */
writel(TCB_CMR_XC1 | TCB_CMR_WAVE, base + TCB_CMR(1));
writel(TCB_CCR_CLKEN, base + TCB_CCR(1));
/* Set XC1 input to be TIOA0 (ie output of Channel 0) */
writel(TCB_BMR_TC1XC1S_TIOA0, base + TCB_BMR);
/* Sync & start all timers */
writel(TCB_BCR_SYNC, base + TCB_BCR);
}
static int atmel_tcb_probe(struct udevice *dev)
{
struct atmel_tcb_plat *plat = dev_get_plat(dev);
struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
struct clk clk;
ulong clk_rate;
int ret;
if (!device_is_compatible(dev->parent, "atmel,sama5d2-tcb"))
return -EINVAL;
/* Currently, we only support channel 0 and 1 to be chained */
if (dev_read_addr_index(dev, 0) != 0 &&
dev_read_addr_index(dev, 1) != 1) {
printf("Error: only chained timers 0 and 1 are supported\n");
return -EINVAL;
}
ret = clk_get_by_name(dev->parent, "t0_clk", &clk);
if (ret)
return -EINVAL;
ret = clk_enable(&clk);
if (ret)
return ret;
clk_rate = clk_get_rate(&clk);
if (!clk_rate) {
clk_disable(&clk);
return -EINVAL;
}
uc_priv->clock_rate = clk_rate / TCB_CLK_DIVISOR;
atmel_tcb_configure(plat->base);
return 0;
}
static int atmel_tcb_of_to_plat(struct udevice *dev)
{
struct atmel_tcb_plat *plat = dev_get_plat(dev);
plat->base = dev_read_addr_ptr(dev->parent);
return 0;
}
static const struct timer_ops atmel_tcb_ops = {
.get_count = atmel_tcb_get_count,
};
static const struct udevice_id atmel_tcb_ids[] = {
{ .compatible = "atmel,tcb-timer" },
{ }
};
U_BOOT_DRIVER(atmel_tcb) = {
.name = "atmel_tcb",
.id = UCLASS_TIMER,
.of_match = atmel_tcb_ids,
.of_to_plat = atmel_tcb_of_to_plat,
.plat_auto = sizeof(struct atmel_tcb_plat),
.probe = atmel_tcb_probe,
.ops = &atmel_tcb_ops,
};