- Update MAINTAINERS file (Stefan) - wdt-uclass.c: add a property u-boot, noautostart (Philippe) - armada_37xx: Probe driver also when watchdog is already running (Pali) - rti_wdt: Add 10% safety margin to clock frequency (Jan)
This commit is contained in:
@@ -1326,6 +1326,14 @@ F: include/virtio*.h
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F: test/dm/virtio.c
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F: doc/develop/driver-model/virtio.rst
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WATCHDOG
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M: Stefan Roese <sr@denx.de>
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S: Maintained
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T: git https://source.denx.de/u-boot/custodians/u-boot-watchdog.git
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F: cmd/wdt.c
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F: drivers/watchdog/
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F: include/watchdog*.h
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X86
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M: Simon Glass <sjg@chromium.org>
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M: Bin Meng <bmeng.cn@gmail.com>
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@@ -58,13 +58,11 @@ static void counter_disable(struct a37xx_wdt *priv, int id)
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clrbits_le32(priv->reg + CNTR_CTRL(id), CNTR_CTRL_ENABLE);
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}
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static int init_counter(struct a37xx_wdt *priv, int id, u32 mode, u32 trig_src)
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static void init_counter(struct a37xx_wdt *priv, int id, u32 mode, u32 trig_src)
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{
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u32 reg;
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reg = readl(priv->reg + CNTR_CTRL(id));
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if (reg & CNTR_CTRL_ACTIVE)
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return -EBUSY;
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reg &= ~(CNTR_CTRL_MODE_MASK | CNTR_CTRL_PRESCALE_MASK |
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CNTR_CTRL_TRIG_SRC_MASK);
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@@ -79,8 +77,6 @@ static int init_counter(struct a37xx_wdt *priv, int id, u32 mode, u32 trig_src)
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reg |= trig_src;
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writel(reg, priv->reg + CNTR_CTRL(id));
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return 0;
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}
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static int a37xx_wdt_reset(struct udevice *dev)
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@@ -116,16 +112,9 @@ static int a37xx_wdt_expire_now(struct udevice *dev, ulong flags)
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static int a37xx_wdt_start(struct udevice *dev, u64 ms, ulong flags)
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{
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struct a37xx_wdt *priv = dev_get_priv(dev);
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int err;
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err = init_counter(priv, 0, CNTR_CTRL_MODE_ONESHOT, 0);
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if (err < 0)
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return err;
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err = init_counter(priv, 1, CNTR_CTRL_MODE_HWSIG,
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CNTR_CTRL_TRIG_SRC_PREV_CNTR);
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if (err < 0)
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return err;
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init_counter(priv, 0, CNTR_CTRL_MODE_ONESHOT, 0);
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init_counter(priv, 1, CNTR_CTRL_MODE_HWSIG, CNTR_CTRL_TRIG_SRC_PREV_CNTR);
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priv->timeout = ms * priv->clk_rate / 1000 / CNTR_CTRL_PRESCALE_MIN;
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@@ -41,7 +41,7 @@
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struct rti_wdt_priv {
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phys_addr_t regs;
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unsigned int clk_khz;
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unsigned int clk_hz;
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};
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#ifdef CONFIG_WDT_K3_RTI_LOAD_FW
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@@ -139,7 +139,7 @@ static int rti_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
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if (ret < 0)
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return ret;
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timer_margin = timeout_ms * priv->clk_khz / 1000;
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timer_margin = timeout_ms * priv->clk_hz / 1000;
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timer_margin >>= WDT_PRELOAD_SHIFT;
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if (timer_margin > WDT_PRELOAD_MAX)
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timer_margin = WDT_PRELOAD_MAX;
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@@ -185,7 +185,15 @@ static int rti_wdt_probe(struct udevice *dev)
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if (ret)
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return ret;
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priv->clk_khz = clk_get_rate(&clk);
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priv->clk_hz = clk_get_rate(&clk);
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/*
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* If watchdog is running at 32k clock, it is not accurate.
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* Adjust frequency down in this case so that it does not expire
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* earlier than expected.
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*/
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if (priv->clk_hz < 32768)
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priv->clk_hz = priv->clk_hz * 9 / 10;
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return 0;
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}
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@@ -36,6 +36,8 @@ struct wdt_priv {
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ulong next_reset;
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/* Whether watchdog_start() has been called on the device. */
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bool running;
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/* No autostart */
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bool noautostart;
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};
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static void init_watchdog_dev(struct udevice *dev)
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@@ -52,7 +54,7 @@ static void init_watchdog_dev(struct udevice *dev)
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dev->name);
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}
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if (!IS_ENABLED(CONFIG_WATCHDOG_AUTOSTART)) {
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if (!IS_ENABLED(CONFIG_WATCHDOG_AUTOSTART) || priv->noautostart) {
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printf("WDT: Not starting %s\n", dev->name);
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return;
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}
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@@ -256,16 +258,19 @@ static int wdt_pre_probe(struct udevice *dev)
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* indicated by a hw_margin_ms property.
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*/
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ulong reset_period = 1000;
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bool noautostart = false;
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struct wdt_priv *priv;
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if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) {
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timeout = dev_read_u32_default(dev, "timeout-sec", timeout);
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reset_period = dev_read_u32_default(dev, "hw_margin_ms",
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4 * reset_period) / 4;
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noautostart = dev_read_bool(dev, "u-boot,noautostart");
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}
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priv = dev_get_uclass_priv(dev);
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priv->timeout = timeout;
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priv->reset_period = reset_period;
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priv->noautostart = noautostart;
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/*
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* Pretend this device was last reset "long" ago so the first
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* watchdog_reset will actually call its ->reset method.
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