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RAM: Add changes for i.MXRT11xx series

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The i.MXRT11 series has different offsets for IOCR_MUX, it also can
address 64MiB of SDRAM so add a macro for that.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
This commit is contained in:
Jesse Taube 2022-07-26 01:43:44 -04:00 committed by Stefano Babic
parent 79f7632e80
commit 7d9c6f1781
2 changed files with 10 additions and 0 deletions
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9
drivers/ram/imxrt_sdram.c
View File

@ -87,12 +87,21 @@ struct imxrt_semc_regs {
u32 sts[16];
};
#if !defined(TARGET_IMXRT1170_EVK)
#define SEMC_IOCR_MUX_A8_SHIFT 0
#define SEMC_IOCR_MUX_CSX0_SHIFT 3
#define SEMC_IOCR_MUX_CSX1_SHIFT 6
#define SEMC_IOCR_MUX_CSX2_SHIFT 9
#define SEMC_IOCR_MUX_CSX3_SHIFT 12
#define SEMC_IOCR_MUX_RDY_SHIFT 15
#else
#define SEMC_IOCR_MUX_A8_SHIFT 0
#define SEMC_IOCR_MUX_CSX0_SHIFT 4
#define SEMC_IOCR_MUX_CSX1_SHIFT 8
#define SEMC_IOCR_MUX_CSX2_SHIFT 12
#define SEMC_IOCR_MUX_CSX3_SHIFT 16
#define SEMC_IOCR_MUX_RDY_SHIFT 20
#endif
struct imxrt_sdram_mux {
u8 a8;

1
include/dt-bindings/memory/imxrt-sdram.h
View File

@ -82,6 +82,7 @@
#define MEM_WIDTH_8BITS 0x0
#define MEM_WIDTH_16BITS 0x1
#define MEM_WIDTH_32BITS 0x2
#define BL_1 0x0
#define BL_2 0x1