This commit is contained in:
Tom Rini 2016-10-30 08:11:50 -04:00
commit 7ce79599a1
22 changed files with 67 additions and 22 deletions

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@ -1096,7 +1096,7 @@ u-boot-x86-16bit.bin: u-boot FORCE
$(call if_changed,objcopy)
endif
ifneq ($(CONFIG_SUNXI),)
ifneq ($(CONFIG_ARCH_SUNXI),)
OBJCOPYFLAGS_u-boot-sunxi-with-spl.bin = -I binary -O binary \
--pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff
u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img FORCE

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@ -12,7 +12,7 @@ obj-y += cache_v7.o cache_v7_asm.o
obj-y += cpu.o cp15.o
obj-y += syslib.o
ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_MX7)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_SUNXI)$(CONFIG_ARCH_SOCFPGA)$(CONFIG_LS102XA),)
ifneq ($(CONFIG_AM43XX)$(CONFIG_AM33XX)$(CONFIG_OMAP44XX)$(CONFIG_OMAP54XX)$(CONFIG_TEGRA)$(CONFIG_MX6)$(CONFIG_MX7)$(CONFIG_TI81XX)$(CONFIG_AT91FAMILY)$(CONFIG_ARCH_SUNXI)$(CONFIG_ARCH_SOCFPGA)$(CONFIG_LS102XA),)
ifneq ($(CONFIG_SKIP_LOWLEVEL_INIT),y)
obj-y += lowlevel_init.o
endif

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@ -46,6 +46,7 @@
aliases {
serial0 = &uart0;
ethernet0 = &emac;
};
soc {
@ -78,3 +79,15 @@
pinctrl-0 = <&i2c1_pins>;
status = "okay";
};
&usbphy {
status = "okay";
};
&ohci1 {
status = "okay";
};
&ehci1 {
status = "okay";
};

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@ -653,5 +653,34 @@
#address-cells = <1>;
#size-cells = <0>;
};
usbphy: phy@1c1b810 {
compatible = "allwinner,sun50i-a64-usb-phy",
"allwinner,sun8i-a33-usb-phy";
reg = <0x01c1b810 0x14>, <0x01c1b800 0x4>;
reg-names = "phy_ctrl", "pmu1";
status = "disabled";
#phy-cells = <1>;
};
ehci1: usb@01c1b000 {
compatible = "allwinner,sun50i-a64-ehci",
"generic-ehci";
reg = <0x01c1b000 0x100>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
ohci1: usb@01c1b400 {
compatible = "allwinner,sun50i-a64-ohci",
"generic-ohci";
reg = <0x01c1b400 0x100>;
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "enabled";
};
};
};

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@ -56,7 +56,7 @@
#define SUNXI_USB2_BASE 0x01c1c000
#endif
#ifdef CONFIG_SUNXI_GEN_SUN6I
#ifdef CONFIG_MACH_SUN8I_H3
#if defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I)
#define SUNXI_USBPHY_BASE 0x01c19000
#define SUNXI_USB0_BASE 0x01c1a000
#define SUNXI_USB1_BASE 0x01c1b000

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@ -146,12 +146,13 @@ __maybe_unused static void usb_phy_write(struct sunxi_usb_phy *phy, int addr,
}
}
#if defined CONFIG_MACH_SUN8I_H3
#if defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I)
static void sunxi_usb_phy_config(struct sunxi_usb_phy *phy)
{
#if defined CONFIG_MACH_SUN8I_H3
if (phy->id == 0)
clrbits_le32(SUNXI_USBPHY_BASE + REG_PHY_UNK_H3, 0x01);
#endif
clrbits_le32(phy->base + REG_PMU_UNK_H3, 0x02);
}
#elif defined CONFIG_MACH_SUN8I_A83T

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@ -2,7 +2,7 @@ CONFIG_ARM=y
CONFIG_ARCH_SUNXI=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_MACH_SUN7I=y
CONFIG_DRAM_CLK=480
CONFIG_DRAM_CLK=384
CONFIG_MMC0_CD_PIN="PH1"
CONFIG_MMC3_CD_PIN="PH0"
CONFIG_MMC3_PINS="PH"

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@ -11,3 +11,4 @@ CONFIG_CONSOLE_MUX=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_SUN8I_EMAC=y
CONFIG_USB_EHCI_HCD=y

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@ -29,7 +29,7 @@ DECLARE_GLOBAL_DATA_PTR;
#include <asm/arch/orion5x.h>
#elif (defined(CONFIG_KIRKWOOD) || defined(CONFIG_ARCH_MVEBU))
#include <asm/arch/soc.h>
#elif defined(CONFIG_SUNXI)
#elif defined(CONFIG_ARCH_SUNXI)
#include <asm/arch/i2c.h>
#else
#error Driver mvtwsi not supported by SoC or board
@ -40,7 +40,7 @@ DECLARE_GLOBAL_DATA_PTR;
* TWSI register structure
*/
#ifdef CONFIG_SUNXI
#ifdef CONFIG_ARCH_SUNXI
struct mvtwsi_registers {
u32 slave_address;
@ -399,7 +399,7 @@ static int twsi_stop(struct mvtwsi_registers *twsi, uint tick)
*/
static uint twsi_calc_freq(const int n, const int m)
{
#ifdef CONFIG_SUNXI
#ifdef CONFIG_ARCH_SUNXI
return CONFIG_SYS_TCLK / (10 * (m + 1) * (1 << n));
#else
return CONFIG_SYS_TCLK / (10 * (m + 1) * (2 << n));

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@ -45,10 +45,10 @@ static int ehci_usb_probe(struct udevice *dev)
* clocks resp. phys.
*/
priv->ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_EHCI0;
#ifdef CONFIG_MACH_SUN8I_H3
#if defined(CONFIG_MACH_SUN8I_H3) || defined(CONFIG_MACH_SUN50I)
extra_ahb_gate_mask = 1 << AHB_GATE_OFFSET_USB_OHCI0;
#endif
priv->phy_index = ((u32)hccr - SUNXI_USB1_BASE) / BASE_DIST;
priv->phy_index = ((uintptr_t)hccr - SUNXI_USB1_BASE) / BASE_DIST;
priv->ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
extra_ahb_gate_mask <<= priv->phy_index * AHB_CLK_DIST;
priv->phy_index++; /* Non otg phys start at 1 */
@ -63,7 +63,7 @@ static int ehci_usb_probe(struct udevice *dev)
sunxi_usb_phy_init(priv->phy_index);
sunxi_usb_phy_power_on(priv->phy_index);
hcor = (struct ehci_hcor *)((uint32_t)hccr +
hcor = (struct ehci_hcor *)((uintptr_t)hccr +
HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
return ehci_register(dev, hccr, hcor, NULL, 0, plat->init_type);
@ -98,6 +98,7 @@ static const struct udevice_id ehci_usb_ids[] = {
{ .compatible = "allwinner,sun8i-a83t-ehci", },
{ .compatible = "allwinner,sun8i-h3-ehci", },
{ .compatible = "allwinner,sun9i-a80-ehci", },
{ .compatible = "allwinner,sun50i-a64-ehci", },
{ }
};

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@ -101,6 +101,7 @@ static const struct udevice_id ohci_usb_ids[] = {
{ .compatible = "allwinner,sun8i-a83t-ohci", },
{ .compatible = "allwinner,sun8i-h3-ohci", },
{ .compatible = "allwinner,sun9i-a80-ohci", },
{ .compatible = "allwinner,sun50i-a64-ohci", },
{ }
};

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@ -14,7 +14,6 @@
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_SUNXI
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#endif
#define CONFIG_SUNXI_USB_PHYS 3

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@ -11,6 +11,11 @@
* A64 specific configuration
*/
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_SUNXI
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#endif
#define CONFIG_SUNXI_USB_PHYS 1
#define COUNTER_FREQUENCY CONFIG_TIMER_CLK_FREQ

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@ -14,7 +14,6 @@
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_SUNXI
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#endif
#define CONFIG_SUNXI_USB_PHYS 2

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@ -17,7 +17,6 @@
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_SUNXI
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#endif
#define CONFIG_SUNXI_USB_PHYS 3

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@ -15,7 +15,6 @@
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_SUNXI
#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
#endif
#define CONFIG_SUNXI_USB_PHYS 3

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@ -15,7 +15,6 @@
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_SUNXI
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#endif
#ifdef CONFIG_MACH_SUN8I_H3

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@ -35,7 +35,6 @@
/*
* High Level Configuration Options
*/
#define CONFIG_SUNXI /* sunxi family */
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SYS_THUMB_BUILD /* Thumbs mode to save space in SPL */
#endif

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@ -166,7 +166,7 @@ ifdef CONFIG_ARCH_SOCFPGA
ALL-y += $(obj)/$(SPL_BIN).sfp
endif
ifdef CONFIG_SUNXI
ifdef CONFIG_ARCH_SUNXI
ALL-y += $(obj)/sunxi-spl.bin
endif

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@ -4355,7 +4355,6 @@ CONFIG_STV0991_HZ
CONFIG_STV0991_HZ_CLOCK
CONFIG_ST_SMI
CONFIG_SUN4
CONFIG_SUNXI
CONFIG_SUNXI_AHCI
CONFIG_SUNXI_EMAC
CONFIG_SUNXI_GMAC

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@ -13,6 +13,7 @@ CONFIG_CMD_NET = y
CONFIG_XWAY_SWAP_BYTES = y
CONFIG_NETCONSOLE = y
CONFIG_SHA1_CHECK_UB_IMG = y
CONFIG_SUNXI = y
endif
subdir-$(HOST_TOOLS_ALL) += easylogo
@ -169,7 +170,7 @@ hostprogs-$(CONFIG_MX23) += mxsboot
hostprogs-$(CONFIG_MX28) += mxsboot
HOSTCFLAGS_mxsboot.o := -pedantic
hostprogs-$(CONFIG_SUNXI) += mksunxiboot
hostprogs-$(CONFIG_ARCH_SUNXI) += mksunxiboot
hostprogs-$(CONFIG_NETCONSOLE) += ncb
hostprogs-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1

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@ -15,7 +15,7 @@
#include <errno.h>
#include <sys/types.h>
#include <sys/stat.h>
#include "asm/arch/spl.h"
#include "../arch/arm/include/asm/arch-sunxi/spl.h"
#define STAMP_VALUE 0x5F0A6C39