mpc83xx: Migrate CONFIG_LCRR_* to Kconfig

Migrate the CONFIG_LCRR_* settings to Kconfig. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2019-01-21 09:18:14 +01:00
parent e35012e802
commit 7c2e535770
83 changed files with 281 additions and 120 deletions
--- a/include/configs/MPC8308RDB.h
+++ b/include/configs/MPC8308RDB.h
@@ -126,8 +126,6 @@
 /*
 * Local Bus Configuration & Clock Setup
 */
-#define CONFIG_SYS_LCRR_DBYP		LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV		LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR		0x00040000

 /*
--- a/include/configs/MPC8313ERDB_NAND.h
+++ b/include/configs/MPC8313ERDB_NAND.h
@@ -191,8 +191,6 @@
 /*
 * Local Bus LCRR and LBCR regs
 */
-#define CONFIG_SYS_LCRR_EADC	LCRR_EADC_1
-#define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR	(0x00040000 /* TODO */ \
 				| (0xFF << LBCR_BMT_SHIFT) \
 				| 0xF)	/* 0x0004ff0f */
--- a/include/configs/MPC8313ERDB_NOR.h
+++ b/include/configs/MPC8313ERDB_NOR.h
@@ -164,8 +164,6 @@
 /*
 * Local Bus LCRR and LBCR regs
 */
-#define CONFIG_SYS_LCRR_EADC	LCRR_EADC_1
-#define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR	(0x00040000 /* TODO */ \
 				| (0xFF << LBCR_BMT_SHIFT) \
 				| 0xF)	/* 0x0004ff0f */
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -121,8 +121,6 @@
 /*
 * Local Bus Configuration & Clock Setup
 */
-#define CONFIG_SYS_LCRR_DBYP	LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV		LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR		0x00040000
 #define CONFIG_FSL_ELBC		1

--- a/include/configs/MPC8323ERDB.h
+++ b/include/configs/MPC8323ERDB.h
@@ -118,8 +118,6 @@
 /*
 * Local Bus Configuration & Clock Setup
 */
-#define CONFIG_SYS_LCRR_DBYP		LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV		LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR		0x00000000

 /*
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -118,8 +118,6 @@
 /*
 * Local Bus Configuration & Clock Setup
 */
-#define CONFIG_SYS_LCRR_DBYP		LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV		LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR		0x00000000

 /*
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -161,8 +161,6 @@
 * External Local Bus rate is
 *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
 */
-#define CONFIG_SYS_LCRR_DBYP	LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR	0x00000000

 /*
--- a/include/configs/MPC8349EMDS_SDRAM.h
+++ b/include/configs/MPC8349EMDS_SDRAM.h
@@ -158,8 +158,6 @@
 * External Local Bus rate is
 *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
 */
-#define CONFIG_SYS_LCRR_DBYP	LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR	0x00000000

 /*
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -258,8 +258,6 @@ boards, we say we have two, but don't display a message if we find only one. */
 * External Local Bus rate is
 *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
 */
-#define CONFIG_SYS_LCRR_DBYP	LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR	0x00000000

 				/* LB sdram refresh timer, about 6us */
--- a/include/configs/MPC837XEMDS.h
+++ b/include/configs/MPC837XEMDS.h
@@ -139,8 +139,6 @@
 /*
 * Local Bus Configuration & Clock Setup
 */
-#define CONFIG_SYS_LCRR_DBYP	LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_8
 #define CONFIG_SYS_LBC_LBCR		0x00000000
 #define CONFIG_FSL_ELBC		1

--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -163,8 +163,6 @@
 /*
 * Local Bus Configuration & Clock Setup
 */
-#define CONFIG_SYS_LCRR_DBYP	LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_8
 #define CONFIG_SYS_LBC_LBCR		0x00000000
 #define CONFIG_FSL_ELBC		1

--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -16,18 +16,6 @@
 */
 #define CONFIG_E300		1	/* E300 Family */

-/*
- * Local Bus LCRR
- *    LCRR:  DLL bypass, Clock divider is 8
- *
- *    for CSB = 266 MHz it gives LCB clock frequency = 33 MHz
- *
- * External Local Bus rate is
- *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
- */
-#define CONFIG_SYS_LCRR_DBYP	LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_8
-
 /* board pre init: do not call, nothing to do */

 /* detect the number of flash banks */
--- a/include/configs/caddy2.h
+++ b/include/configs/caddy2.h
@@ -104,7 +104,6 @@
 * External Local Bus rate is
 *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
 */
-#define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR	0x00000000

 #undef CONFIG_SYS_LB_SDRAM	/* if board has SDRAM on local bus */
--- a/include/configs/hrcon.h
+++ b/include/configs/hrcon.h
@@ -115,8 +115,6 @@
 /*
 * Local Bus Configuration & Clock Setup
 */
-#define CONFIG_SYS_LCRR_DBYP		LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV		LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR		0x00040000

 /*
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -39,8 +39,6 @@
 /*
 * Local Bus LCRR and LBCR regs
 */
-#define CONFIG_SYS_LCRR_EADC		LCRR_EADC_1
-#define CONFIG_SYS_LCRR_CLKDIV		LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR		(0x00040000 |\
 					 (0xFF << LBCR_BMT_SHIFT) |\
 					 0xF)
--- a/include/configs/kmcoge5ne.h
+++ b/include/configs/kmcoge5ne.h
@@ -296,13 +296,6 @@
 /* EEprom support */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2

-/*
- * Local Bus Configuration & Clock Setup
- */
-#define CONFIG_SYS_LCRR_DBYP		LCRR_DBYP
-#define CONFIG_SYS_LCRR_EADC		LCRR_EADC_2
-#define CONFIG_SYS_LCRR_CLKDIV		LCRR_CLKDIV_4
-
 /*
 * PAXE on the local bus CS3
 */
--- a/include/configs/kmeter1.h
+++ b/include/configs/kmeter1.h
@@ -276,13 +276,6 @@
 /* EEprom support */
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2

-/*
- * Local Bus Configuration & Clock Setup
- */
-#define CONFIG_SYS_LCRR_DBYP		LCRR_DBYP
-#define CONFIG_SYS_LCRR_EADC		LCRR_EADC_2
-#define CONFIG_SYS_LCRR_CLKDIV		LCRR_CLKDIV_4
-
 /*
 * PAXE on the local bus CS3
 */
--- a/include/configs/kmopti2.h
+++ b/include/configs/kmopti2.h
@@ -294,10 +294,6 @@
 /*
 * Local Bus Configuration & Clock Setup
 */
-#define CONFIG_SYS_LCRR_DBYP	0x80000000
-#define CONFIG_SYS_LCRR_EADC	0x00010000
-#define CONFIG_SYS_LCRR_CLKDIV	0x00000002
-
 #define CONFIG_SYS_LBC_LBCR	0x00000000

 #define CONFIG_SYS_APP1_BASE	0xA0000000    /* PAXG */
--- a/include/configs/kmsupx5.h
+++ b/include/configs/kmsupx5.h
@@ -294,10 +294,6 @@
 /*
 * Local Bus Configuration & Clock Setup
 */
-#define CONFIG_SYS_LCRR_DBYP	0x80000000
-#define CONFIG_SYS_LCRR_EADC	0x00010000
-#define CONFIG_SYS_LCRR_CLKDIV	0x00000002
-
 #define CONFIG_SYS_LBC_LBCR	0x00000000

 #define CONFIG_SYS_APP1_BASE	0xA0000000    /* PAXG */
--- a/include/configs/kmtegr1.h
+++ b/include/configs/kmtegr1.h
@@ -346,10 +346,6 @@
 /*
 * Local Bus Configuration & Clock Setup
 */
-#define CONFIG_SYS_LCRR_DBYP	0x80000000
-#define CONFIG_SYS_LCRR_EADC	0x00010000
-#define CONFIG_SYS_LCRR_CLKDIV	0x00000002
-
 #define CONFIG_SYS_LBC_LBCR	0x00000000

 /* must be after the include because KMBEC_FPGA is otherwise undefined */
--- a/include/configs/kmtepr2.h
+++ b/include/configs/kmtepr2.h
@@ -294,10 +294,6 @@
 /*
 * Local Bus Configuration & Clock Setup
 */
-#define CONFIG_SYS_LCRR_DBYP	0x80000000
-#define CONFIG_SYS_LCRR_EADC	0x00010000
-#define CONFIG_SYS_LCRR_CLKDIV	0x00000002
-
 #define CONFIG_SYS_LBC_LBCR	0x00000000

 #define CONFIG_SYS_APP1_BASE	0xA0000000    /* PAXG */
--- a/include/configs/kmvect1.h
+++ b/include/configs/kmvect1.h
@@ -338,10 +338,6 @@
 /*
 * Local Bus Configuration & Clock Setup
 */
-#define CONFIG_SYS_LCRR_DBYP	0x80000000
-#define CONFIG_SYS_LCRR_EADC	0x00010000
-#define CONFIG_SYS_LCRR_CLKDIV	0x00000002
-
 #define CONFIG_SYS_LBC_LBCR	0x00000000

 #define CONFIG_SYS_APP1_BASE		0xA0000000
--- a/include/configs/mpc8308_p1m.h
+++ b/include/configs/mpc8308_p1m.h
@@ -130,8 +130,6 @@
 /*
 * Local Bus Configuration & Clock Setup
 */
-#define CONFIG_SYS_LCRR_DBYP		LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV		LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR		0x00040000

 /*
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -131,8 +131,6 @@
 * External Local Bus rate is
 *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
 */
-#define CONFIG_SYS_LCRR_DBYP	LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR	0x00000000

 #undef CONFIG_SYS_LB_SDRAM	/* if board has SDRAM on local bus */
--- a/include/configs/strider.h
+++ b/include/configs/strider.h
@@ -115,8 +115,6 @@
 /*
 * Local Bus Configuration & Clock Setup
 */
-#define CONFIG_SYS_LCRR_DBYP		LCRR_DBYP
-#define CONFIG_SYS_LCRR_CLKDIV		LCRR_CLKDIV_2
 #define CONFIG_SYS_LBC_LBCR		0x00040000

 /*
--- a/include/configs/suvd3.h
+++ b/include/configs/suvd3.h
@@ -291,10 +291,6 @@
 /*
 * Local Bus Configuration & Clock Setup
 */
-#define CONFIG_SYS_LCRR_DBYP	0x80000000
-#define CONFIG_SYS_LCRR_EADC	0x00010000
-#define CONFIG_SYS_LCRR_CLKDIV	0x00000002
-
 #define CONFIG_SYS_LBC_LBCR	0x00000000

 #define CONFIG_SYS_APP1_BASE		0xA0000000
--- a/include/configs/tuge1.h
+++ b/include/configs/tuge1.h
@@ -294,10 +294,6 @@
 /*
 * Local Bus Configuration & Clock Setup
 */
-#define CONFIG_SYS_LCRR_DBYP	0x80000000
-#define CONFIG_SYS_LCRR_EADC	0x00010000
-#define CONFIG_SYS_LCRR_CLKDIV	0x00000002
-
 #define CONFIG_SYS_LBC_LBCR	0x00000000

 #define CONFIG_SYS_APP1_BASE	0xA0000000    /* PAXG */
--- a/include/configs/tuxx1.h
+++ b/include/configs/tuxx1.h
@@ -294,10 +294,6 @@
 /*
 * Local Bus Configuration & Clock Setup
 */
-#define CONFIG_SYS_LCRR_DBYP	0x80000000
-#define CONFIG_SYS_LCRR_EADC	0x00010000
-#define CONFIG_SYS_LCRR_CLKDIV	0x00000002
-
 #define CONFIG_SYS_LBC_LBCR	0x00000000

 #define CONFIG_SYS_APP1_BASE	0xA0000000    /* PAXG */
--- a/include/configs/ve8313.h
+++ b/include/configs/ve8313.h
@@ -133,9 +133,6 @@
 /*
 * Local Bus LCRR and LBCR regs
 */
-#define CONFIG_SYS_LCRR_EADC	LCRR_EADC_3
-#define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_2
-
 #define CONFIG_SYS_LBC_LBCR	0x00040000

 #define CONFIG_SYS_LBC_MRTPR	0x20000000
--- a/include/configs/vme8349.h
+++ b/include/configs/vme8349.h
@@ -104,7 +104,6 @@
 * External Local Bus rate is
 *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
 */
-#define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR	0x00000000

 #undef CONFIG_SYS_LB_SDRAM	/* if board has SDRAM on local bus */