ARM: dts: stm32: Sync DT files with v4.20 kernel for stm32f4

Synchronize stm32f7 device tree with kernel v4.20.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This commit is contained in:
Patrice Chotard 2019-02-18 22:54:35 +01:00
parent 933f84cab9
commit 71dfd5f3f5
8 changed files with 142 additions and 40 deletions

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@ -1,6 +1,5 @@
/*
* Copyright (C) 2017, STMicroelectronics - All Rights Reserved
* Author(s): Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
* Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
@ -342,12 +341,12 @@
sdio_pins: sdio_pins@0 {
pins {
pinmux = <STM32_PINMUX('C', 8, AF12)>,
<STM32_PINMUX('C', 9, AF12)>,
<STM32_PINMUX('C', 10, AF12)>,
<STM32_PINMUX('c', 11, AF12)>,
<STM32_PINMUX('C', 12, AF12)>,
<STM32_PINMUX('D', 2, AF12)>;
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDIO_D0 */
<STM32_PINMUX('C', 9, AF12)>, /* SDIO_D1 */
<STM32_PINMUX('C', 10, AF12)>, /* SDIO_D2 */
<STM32_PINMUX('C', 11, AF12)>, /* SDIO_D3 */
<STM32_PINMUX('C', 12, AF12)>, /* SDIO_CK */
<STM32_PINMUX('D', 2, AF12)>; /* SDIO_CMD */
drive-push-pull;
slew-rate = <2>;
};
@ -355,17 +354,17 @@
sdio_pins_od: sdio_pins_od@0 {
pins1 {
pinmux = <STM32_PINMUX('C', 8, AF12)>,
<STM32_PINMUX('C', 9, AF12)>,
<STM32_PINMUX('C', 10, AF12)>,
<STM32_PINMUX('C', 11, AF12)>,
<STM32_PINMUX('C', 12, AF12)>;
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDIO_D0 */
<STM32_PINMUX('C', 9, AF12)>, /* SDIO_D1 */
<STM32_PINMUX('C', 10, AF12)>, /* SDIO_D2 */
<STM32_PINMUX('C', 11, AF12)>, /* SDIO_D3 */
<STM32_PINMUX('C', 12, AF12)>; /* SDIO_CK */
drive-push-pull;
slew-rate = <2>;
};
pins2 {
pinmux = <STM32_PINMUX('D', 2, AF12)>;
pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDIO_CMD */
drive-open-drain;
slew-rate = <2>;
};

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@ -1,6 +1,5 @@
/*
* Copyright (C) 2015, STMicroelectronics - All Rights Reserved
* Author(s): Maxime Coquelin <mcoquelin.stm32@gmail.com> for STMicroelectronics.
* Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
@ -76,6 +75,7 @@
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {

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@ -1,6 +1,5 @@
/*
* Copyright (C) 2017, STMicroelectronics - All Rights Reserved
* Author(s): Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
* Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual

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@ -1,6 +1,5 @@
/*
* Copyright (C) 2015, STMicroelectronics - All Rights Reserved
* Author(s): Maxime Coquelin <mcoquelin.stm32@gmail.com> for STMicroelectronics.
* Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
@ -259,6 +258,7 @@
};
timers13: timers@40001c00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40001C00 0x400>;
@ -273,6 +273,7 @@
};
timers14: timers@40002000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40002000 0x400>;
@ -296,7 +297,7 @@
interrupt-parent = <&exti>;
interrupts = <17 1>;
interrupt-names = "alarm";
st,syscfg = <&pwrcfg>;
st,syscfg = <&pwrcfg 0x00 0x100>;
status = "disabled";
};
@ -304,6 +305,7 @@
compatible = "st,stm32-iwdg";
reg = <0x40003000 0x400>;
clocks = <&clk_lsi>;
clock-names = "lsi";
status = "disabled";
};
@ -505,6 +507,17 @@
};
};
sdio: sdio@40012c00 {
compatible = "arm,pl180", "arm,primecell";
arm,primecell-periphid = <0x00880180>;
reg = <0x40012c00 0x400>;
clocks = <&rcc 0 STM32F4_APB2_CLOCK(SDIO)>;
clock-names = "apb_pclk";
interrupts = <49>;
max-frequency = <48000000>;
status = "disabled";
};
syscfg: system-config@40013800 {
compatible = "syscon";
reg = <0x40013800 0x400>;
@ -540,6 +553,7 @@
};
timers10: timers@40014400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40014400 0x400>;
@ -554,6 +568,7 @@
};
timers11: timers@40014800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers";
reg = <0x40014800 0x400>;
@ -572,18 +587,6 @@
reg = <0x40007000 0x400>;
};
sdio: sdio@40012c00 {
compatible = "st,stm32f4xx-sdio";
reg = <0x40012c00 0x400>;
clocks = <&rcc 0 171>;
interrupts = <49>;
status = "disabled";
pinctrl-0 = <&sdio_pins>;
pinctrl-1 = <&sdio_pins_od>;
pinctrl-names = "default", "opendrain";
max-frequency = <48000000>;
};
ltdc: display-controller@40016800 {
compatible = "st,stm32-ltdc";
reg = <0x40016800 0x200>;

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@ -41,8 +41,10 @@
*/
/dts-v1/;
#include "stm32f429.dtsi"
#include "stm32f469.dtsi"
#include "stm32f469-pinctrl.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "STMicroelectronics STM32F469i-DISCO board";
@ -72,11 +74,40 @@
dma-ranges = <0xc0000000 0x0 0x10000000>;
};
leds {
compatible = "gpio-leds";
green {
gpios = <&gpiog 6 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
orange {
gpios = <&gpiod 4 GPIO_ACTIVE_LOW>;
};
red {
gpios = <&gpiod 5 GPIO_ACTIVE_LOW>;
};
blue {
gpios = <&gpiok 3 GPIO_ACTIVE_LOW>;
};
};
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
button@0 {
label = "User";
linux,code = <KEY_WAKEUP>;
gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;
};
};
/* This turns on vbus for otg for host mode (dwc2) */
vcc5v_otg: vcc5v-otg-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpiob 2 0>;
gpio = <&gpiob 2 GPIO_ACTIVE_HIGH>;
regulator-name = "vcc5_host1";
regulator-always-on;
};
@ -90,6 +121,55 @@
clock-frequency = <8000000>;
};
&dsi {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dsi_in: endpoint {
remote-endpoint = <&ltdc_out_dsi>;
};
};
port@1 {
reg = <1>;
dsi_out: endpoint {
remote-endpoint = <&dsi_panel_in>;
};
};
};
panel-dsi@0 {
compatible = "orisetech,otm8009a";
reg = <0>; /* dsi virtual channel (0..3) */
reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;
status = "okay";
port {
dsi_panel_in: endpoint {
remote-endpoint = <&dsi_out>;
};
};
};
};
&ltdc {
dma-ranges;
status = "okay";
port {
ltdc_out_dsi: endpoint@0 {
remote-endpoint = <&dsi_in>;
};
};
};
&rtc {
status = "okay";
};
@ -125,6 +205,8 @@
&sdio {
status = "okay";
vmmc-supply = <&mmc_vcard>;
cd-gpios = <&gpiog 2 GPIO_ACTIVE_LOW>;
broken-cd;
pinctrl-names = "default", "opendrain";
pinctrl-0 = <&sdio_pins>;
pinctrl-1 = <&sdio_pins_od>;

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@ -1,6 +1,5 @@
/*
* Copyright (C) 2017, STMicroelectronics - All Rights Reserved
* Author(s): Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
* Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual

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@ -0,0 +1,19 @@
// SPDX-License-Identifier: GPL-2.0+
/* Copyright (C) STMicroelectronics 2017 - All Rights Reserved */
#include "stm32f429.dtsi"
/ {
soc {
dsi: dsi@40016c00 {
compatible = "st,stm32-dsi";
reg = <0x40016c00 0x800>;
interrupts = <92>;
resets = <&rcc STM32F4_APB2_RESET(DSI)>;
reset-names = "apb";
clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;
clock-names = "pclk", "ref";
status = "disabled";
};
};
};

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@ -33,11 +33,12 @@
#define CLK_SAI2 11
#define CLK_I2SQ_PDIV 12
#define CLK_SAIQ_PDIV 13
#define END_PRIMARY_CLK 14
#define CLK_HSI 14
#define CLK_SYSCLK 15
#define CLK_F469_DSI 16
#define END_PRIMARY_CLK 17
#define CLK_HDMI_CEC 16
#define CLK_SPDIF 17
#define CLK_USART1 18