PXA: Implement ELF relocation
Based on patch by: Albert Aribaud <albert.aribaud@free.fr> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
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Marek Vasut
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6e96cf9a81
@ -8,6 +8,7 @@
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* Copyright (C) 2002 Kyle Harris <kharris@nexus-tech.net>
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* Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>
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* Copyright (C) 2003 Kai-Uwe Bloem <kai-uwe.bloem@auerswald.de>
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* Copyright (c) 2010 Marek Vasut <marek.vasut@gmail.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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@ -94,20 +95,16 @@ _fiq: .word fiq
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_TEXT_BASE:
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.word CONFIG_SYS_TEXT_BASE
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.globl _armboot_start
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_armboot_start:
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.word _start
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/*
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* These are defined in the board-specific linker script.
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*/
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.globl _bss_start
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_bss_start:
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.word __bss_start
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.globl _bss_start_ofs
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_bss_start_ofs:
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.word __bss_start - _start
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.globl _bss_end
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_bss_end:
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.word _end
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.globl _bss_end_ofs
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_bss_end_ofs:
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.word _end - _start
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#ifdef CONFIG_USE_IRQ
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/* IRQ stack memory (calculated at run-time) */
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@ -127,30 +124,6 @@ FIQ_STACK_START:
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IRQ_STACK_START_IN:
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.word 0x0badc0de
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.globl _datarel_start
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_datarel_start:
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.word __datarel_start
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.globl _datarelrolocal_start
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_datarelrolocal_start:
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.word __datarelrolocal_start
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.globl _datarellocal_start
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_datarellocal_start:
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.word __datarellocal_start
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.globl _datarelro_start
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_datarelro_start:
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.word __datarelro_start
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.globl _got_start
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_got_start:
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.word __got_start
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.globl _got_end
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_got_end:
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.word __got_end
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/*
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* the actual reset code
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*/
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@ -272,9 +245,8 @@ stack_setup:
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adr r0, _start
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ldr r2, _TEXT_BASE
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ldr r3, _bss_start
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sub r2, r3, r2 /* r2 <- size of armboot */
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add r2, r0, r2 /* r2 <- source end address */
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ldr r3, _bss_start_ofs
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add r2, r0, r3 /* r2 <- source end address */
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cmp r0, r6
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beq clear_bss
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@ -288,36 +260,54 @@ copy_loop:
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ldmfd sp!, {r0-r12}
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#ifndef CONFIG_PRELOADER
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/* fix got entries */
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ldr r1, _TEXT_BASE /* Text base */
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mov r0, r7 /* reloc addr */
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ldr r2, _got_start /* addr in Flash */
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ldr r3, _got_end /* addr in Flash */
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sub r3, r3, r1
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add r3, r3, r0
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sub r2, r2, r1
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add r2, r2, r0
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/*
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* fix .rel.dyn relocations
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*/
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ldr r0, _TEXT_BASE /* r0 <- Text base */
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sub r9, r7, r0 /* r9 <- relocation offset */
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ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
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add r10, r10, r0 /* r10 <- sym table in FLASH */
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ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
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add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
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ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
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add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
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fixloop:
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ldr r4, [r2]
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sub r4, r4, r1
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add r4, r4, r0
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str r4, [r2]
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add r2, r2, #4
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ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
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add r0, r9 /* r0 <- location to fix up in RAM */
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ldr r1, [r2, #4]
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and r8, r1, #0xff
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cmp r8, #23 /* relative fixup? */
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beq fixrel
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cmp r8, #2 /* absolute fixup? */
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beq fixabs
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/* ignore unknown type of fixup */
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b fixnext
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fixabs:
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/* absolute fix: set location to (offset) symbol value */
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mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
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add r1, r10, r1 /* r1 <- address of symbol in table */
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ldr r1, [r1, #4] /* r1 <- symbol value */
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add r1, r9 /* r1 <- relocated sym addr */
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b fixnext
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fixrel:
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/* relative fix: increase location by offset */
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ldr r1, [r0]
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add r1, r1, r9
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fixnext:
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str r1, [r0]
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add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
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cmp r2, r3
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bne fixloop
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blo fixloop
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#endif
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#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
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clear_bss:
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#ifndef CONFIG_PRELOADER
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ldr r0, _bss_start
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ldr r1, _bss_end
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ldr r0, _bss_start_ofs
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ldr r1, _bss_end_ofs
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ldr r3, _TEXT_BASE /* Text base */
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mov r4, r7 /* reloc addr */
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sub r0, r0, r3
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add r0, r0, r4
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sub r1, r1, r3
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add r1, r1, r4
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mov r2, #0x00000000 /* clear */
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@ -332,24 +322,33 @@ clbss_l:str r2, [r0] /* clear loop... */
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* initialization, now running from RAM.
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*/
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#ifdef CONFIG_ONENAND_IPL
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ldr pc, _start_oneboot
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ldr r0, _start_oneboot_ofs
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mov pc, r0
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_start_oneboot: .word start_oneboot
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_start_oneboot_ofs
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: .word start_oneboot
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#else
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ldr r0, _TEXT_BASE
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ldr r2, _board_init_r
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sub r2, r2, r0
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add r2, r2, r7 /* position from board_init_r in RAM */
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ldr r0, _board_init_r_ofs
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adr r1, _start
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add r0, r0, r1
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add lr, r0, r9
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/* setup parameters for board_init_r */
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mov r0, r5 /* gd_t */
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mov r1, r7 /* dest_addr */
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/* jump to it ... */
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mov lr, r2
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mov pc, lr
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_board_init_r: .word board_init_r
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_board_init_r_ofs:
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.word board_init_r - _start
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#endif
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_rel_dyn_start_ofs:
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.word __rel_dyn_start - _start
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_rel_dyn_end_ofs:
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.word __rel_dyn_end - _start
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_dynsym_start_ofs:
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.word __dynsym_start - _start
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#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
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/****************************************************************************/
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@ -41,21 +41,18 @@ SECTIONS
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. = ALIGN(4);
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.data : {
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*(.data)
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__datarel_start = .;
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*(.data.rel)
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__datarelrolocal_start = .;
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*(.data.rel.ro.local)
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__datarellocal_start = .;
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*(.data.rel.local)
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__datarelro_start = .;
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*(.data.rel.ro)
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}
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__got_start = .;
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. = ALIGN(4);
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.got : { *(.got) }
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__rel_dyn_start = .;
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.rel.dyn : { *(.rel.dyn) }
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__rel_dyn_end = .;
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__dynsym_start = .;
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.dynsym : { *(.dynsym) }
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. = ALIGN(4);
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__got_end = .;
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. = .;
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__u_boot_cmd_start = .;
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.u_boot_cmd : { *(.u_boot_cmd) }
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