mmc: tegra: move pad_init_mmc() into MMC driver
pad_init_mmc() is performing an SoC-specific operation, using registers within the MMC controller. There's no reason to implement this code outside the MMC driver, so move it inside the driver. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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@ -151,7 +151,5 @@ struct mmc_host {
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struct mmc_config cfg; /* mmc configuration */
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};
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void pad_init_mmc(struct mmc_host *host);
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#endif /* __ASSEMBLY__ */
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#endif /* __TEGRA_MMC_H_ */
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@ -7,7 +7,6 @@
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#include <common.h>
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#include <asm/arch/tegra.h>
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#include <asm/arch-tegra/mmc.h>
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#include <asm/arch-tegra/tegra_mmc.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -31,10 +30,6 @@ int board_late_init(void)
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return 0;
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}
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void pad_init_mmc(struct mmc_host *host)
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{
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}
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int board_mmc_init(bd_t *bd)
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{
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tegra_mmc_init();
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@ -33,7 +33,6 @@
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#include <usb.h>
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#endif
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#ifdef CONFIG_TEGRA_MMC
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#include <asm/arch-tegra/tegra_mmc.h>
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#include <asm/arch-tegra/mmc.h>
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#endif
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#include <asm/arch-tegra/xusb-padctl.h>
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@ -248,34 +247,6 @@ int board_mmc_init(bd_t *bd)
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return 0;
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}
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void pad_init_mmc(struct mmc_host *host)
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{
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#if defined(CONFIG_TEGRA30)
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enum periph_id id = host->mmc_id;
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u32 val;
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debug("%s: sdmmc address = %08x, id = %d\n", __func__,
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(unsigned int)host->reg, id);
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/* Set the pad drive strength for SDMMC1 or 3 only */
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if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
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debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
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__func__);
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return;
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}
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val = readl(&host->reg->sdmemcmppadctl);
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val &= 0xFFFFFFF0;
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val |= MEMCOMP_PADCTRL_VREF;
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writel(val, &host->reg->sdmemcmppadctl);
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val = readl(&host->reg->autocalcfg);
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val &= 0xFFFF0000;
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val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
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writel(val, &host->reg->autocalcfg);
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#endif /* T30 */
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}
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#endif /* MMC */
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/*
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@ -448,6 +448,34 @@ static void tegra_mmc_set_ios(struct mmc *mmc)
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debug("mmc_set_ios: hostctl = %08X\n", ctrl);
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}
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static void pad_init_mmc(struct mmc_host *host)
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{
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#if defined(CONFIG_TEGRA30)
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enum periph_id id = host->mmc_id;
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u32 val;
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debug("%s: sdmmc address = %08x, id = %d\n", __func__,
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(unsigned int)host->reg, id);
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/* Set the pad drive strength for SDMMC1 or 3 only */
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if (id != PERIPH_ID_SDMMC1 && id != PERIPH_ID_SDMMC3) {
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debug("%s: settings are only valid for SDMMC1/SDMMC3!\n",
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__func__);
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return;
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}
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val = readl(&host->reg->sdmemcmppadctl);
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val &= 0xFFFFFFF0;
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val |= MEMCOMP_PADCTRL_VREF;
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writel(val, &host->reg->sdmemcmppadctl);
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val = readl(&host->reg->autocalcfg);
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val &= 0xFFFF0000;
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val |= AUTO_CAL_PU_OFFSET | AUTO_CAL_PD_OFFSET | AUTO_CAL_ENABLED;
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writel(val, &host->reg->autocalcfg);
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#endif
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}
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static void mmc_reset(struct mmc_host *host, struct mmc *mmc)
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{
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unsigned int timeout;
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