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i2c, omap24xx: convert driver to new mutlibus/mutliadapter framework

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- add omap24xx driver to new multibus/multiadpater support
- adapted all config files, which uses this driver

Tested on the am335x based siemens boards rut, dxr2 and pxm2
posted here:
http://patchwork.ozlabs.org/patch/263211/

Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Tom Rini <trini@ti.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Steve Sakoman <sakoman@gmail.com>
Cc: Thomas Weber <weber@corscience.de>
Cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Grazvydas Ignotas <notasas@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Ilya Yanok <yanok@emcraft.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Nishanth Menon <nm@ti.com>
Cc: Pali Rohár <pali.rohar@gmail.com>
Cc: Peter Barada <peter.barada@logicpd.com>
Cc: Nagendra T S  <nagendra@mistralsolutions.com>
Cc: Michael Jones <michael.jones@matrix-vision.de>
Cc: Raphael Assenat <raph@8d.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Heiko Schocher 2013-10-22 11:03:18 +02:00
parent 124913556c
commit 6789e84eca
41 changed files with 241 additions and 190 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
README
View File

@ -2058,6 +2058,19 @@ CBFS (Coreboot Filesystem) support
- CONFIG_SYS_I2C_SH_SPEED5 for for the speed channel 5
- CONFIF_SYS_I2C_SH_NUM_CONTROLLERS for nummber of i2c buses
- drivers/i2c/omap24xx_i2c.c
- activate this driver with CONFIG_SYS_I2C_OMAP24XX
- CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
- CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
- CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
- CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
- CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
- CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
- CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
- CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
- CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
- CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4
additional defines:
CONFIG_SYS_NUM_I2C_BUSES

3
arch/arm/cpu/armv7/omap-common/clocks-common.c
View File

@ -779,7 +779,8 @@ void gpi2c_init(void)
static int gpi2c = 1;
if (gpi2c) {
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED,
CONFIG_SYS_OMAP24_I2C_SLAVE);
gpi2c = 0;
}
}

4
arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
View File

@ -32,6 +32,10 @@ SECTIONS
. = ALIGN(4);
.data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
. = ALIGN(4);
.u_boot_list : {
KEEP(*(SORT(.u_boot_list*)));
} >.sram
. = ALIGN(4);
__image_copy_end = .;
_end = .;

2
arch/arm/cpu/armv7/omap3/board.c
View File

@ -98,7 +98,7 @@ void spl_board_init(void)
gpmc_init();
#endif
#ifdef CONFIG_SPL_I2C_SUPPORT
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
}
#endif /* CONFIG_SPL_BUILD */

2
arch/arm/cpu/armv7/omap3/clock.c
View File

@ -708,7 +708,7 @@ void per_clocks_enable(void)
sr32(&prcm_base->iclken_per, 17, 1, 1);
#endif
#ifdef CONFIG_DRIVER_OMAP34XX_I2C
#ifdef CONFIG_SYS_I2C_OMAP34XX
/* Turn on all 3 I2C clocks */
sr32(&prcm_base->fclken1_core, 15, 3, 0x7);
sr32(&prcm_base->iclken1_core, 15, 3, 0x7); /* I2C1,2,3 = on */

6
arch/arm/include/asm/arch-am33xx/i2c.h
View File

@ -4,8 +4,8 @@
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _I2C_H_
#define _I2C_H_
#ifndef _I2C_AM33XX_H_
#define _I2C_AM33XX_H_
#define I2C_BASE1 0x44E0B000
#define I2C_BASE2 0x4802A000
@ -62,4 +62,4 @@ struct i2c {
#define I2C_IP_CLK 48000000
#define I2C_INTERNAL_SAMPLING_CLK 12000000
#endif /* _I2C_H_ */
#endif /* _I2C_AM33XX_H_ */

2
board/compulab/cm_t35/cm_t35.c
View File

@ -482,7 +482,7 @@ static void setup_net_chip_gmpc(void)
&ctrl_base->gpmc_nadv_ale);
}
#ifdef CONFIG_DRIVER_OMAP34XX_I2C
#ifdef CONFIG_SYS_I2C_OMAP34XX
/*
* Routine: reset_net_chip
* Description: reset the Ethernet controller via TPS65930 GPIO

2
board/compulab/common/Makefile
View File

@ -6,5 +6,5 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-$(CONFIG_DRIVER_OMAP34XX_I2C) += eeprom.o
obj-$(CONFIG_SYS_I2C_OMAP34XX) += eeprom.o
obj-$(CONFIG_LCD) += omap3_display.o

2
board/compulab/common/eeprom.h
View File

@ -10,7 +10,7 @@
#ifndef _EEPROM_
#define _EEPROM_
#ifdef CONFIG_DRIVER_OMAP34XX_I2C
#ifdef CONFIG_SYS_I2C_OMAP34XX
int cl_eeprom_read_mac_addr(uchar *buf);
u32 cl_eeprom_get_board_rev(void);
#else

4
board/logicpd/am3517evm/am3517evm.c
View File

@ -98,8 +98,8 @@ static void am3517_evm_musb_init(void)
*/
int misc_init_r(void)
{
#ifdef CONFIG_DRIVER_OMAP34XX_I2C
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#ifdef CONFIG_SYS_I2C_OMAP34XX
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
dieid_num_r();

2
board/overo/overo.c
View File

@ -92,7 +92,7 @@ int get_board_revision(void)
{
int revision;
#ifdef CONFIG_DRIVER_OMAP34XX_I2C
#ifdef CONFIG_SYS_I2C_OMAP34XX
unsigned char data;
/* board revisions <= R2410 connect 4030 irq_1 to gpio112 */

4
board/phytec/pcm051/board.c
View File

@ -91,7 +91,7 @@ void set_mux_conf_regs(void)
{
/* Initalize the board header */
enable_i2c0_pin_mux();
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
enable_board_pin_mux();
}
@ -108,7 +108,7 @@ void sdram_init(void)
*/
int board_init(void)
{
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;

4
board/siemens/common/board.c
View File

@ -42,7 +42,7 @@ void set_mux_conf_regs(void)
{
/* Initalize the board header */
enable_i2c0_pin_mux();
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
i2c_set_bus_num(0);
if (read_eeprom() < 0)
puts("Could not get board ID.\n");
@ -67,7 +67,7 @@ int board_init(void)
#if defined(CONFIG_HW_WATCHDOG)
hw_watchdog_init();
#endif /* defined(CONFIG_HW_WATCHDOG) */
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
i2c_set_bus_num(0);
if (read_eeprom() < 0)
puts("Could not get board ID.\n");

2
board/ti/am335x/board.c
View File

@ -397,7 +397,7 @@ const struct dpll_params *get_dpll_ddr_params(void)
struct am335x_baseboard_id header;
enable_i2c0_pin_mux();
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
if (read_eeprom(&header) < 0)
puts("Could not get board ID.\n");

4
board/ti/am3517crane/am3517crane.c
View File

@ -43,8 +43,8 @@ int board_init(void)
*/
int misc_init_r(void)
{
#ifdef CONFIG_DRIVER_OMAP34XX_I2C
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#ifdef CONFIG_SYS_I2C_OMAP34XX
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
dieid_num_r();

4
board/ti/evm/evm.c
View File

@ -146,8 +146,8 @@ void get_board_mem_timings(struct board_sdrc_timings *timings)
int misc_init_r(void)
{
#ifdef CONFIG_DRIVER_OMAP34XX_I2C
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
#ifdef CONFIG_SYS_I2C_OMAP34XX
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
#endif
#if defined(CONFIG_CMD_NET)

4
drivers/i2c/Makefile
View File

@ -12,8 +12,6 @@ obj-$(CONFIG_I2C_MVTWSI) += mvtwsi.o
obj-$(CONFIG_I2C_MV) += mv_i2c.o
obj-$(CONFIG_I2C_MXS) += mxs_i2c.o
obj-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
obj-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
obj-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o
obj-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o
obj-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o
obj-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
@ -23,6 +21,8 @@ obj-$(CONFIG_SYS_I2C) += i2c_core.o
obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
obj-$(CONFIG_SYS_I2C_OMAP34XX) += omap24xx_i2c.o
obj-$(CONFIG_SYS_I2C_PPC4XX) += ppc4xx_i2c.o
obj-$(CONFIG_SYS_I2C_RCAR) += rcar_i2c.o
obj-$(CONFIG_SYS_I2C_SH) += sh_i2c.o

176
drivers/i2c/omap24xx_i2c.c
View File

@ -35,6 +35,7 @@
*/
#include <common.h>
#include <i2c.h>
#include <asm/arch/i2c.h>
#include <asm/io.h>
@ -48,22 +49,14 @@ DECLARE_GLOBAL_DATA_PTR;
/* Absolutely safe for status update at 100 kHz I2C: */
#define I2C_WAIT 200
static int wait_for_bb(void);
static u16 wait_for_event(void);
static void flush_fifo(void);
static int wait_for_bb(struct i2c_adapter *adap);
static struct i2c *omap24_get_base(struct i2c_adapter *adap);
static u16 wait_for_event(struct i2c_adapter *adap);
static void flush_fifo(struct i2c_adapter *adap);
/*
* For SPL boot some boards need i2c before SDRAM is initialised so force
* variables to live in SRAM
*/
static struct i2c __attribute__((section (".data"))) *i2c_base =
(struct i2c *)I2C_DEFAULT_BASE;
static unsigned int __attribute__((section (".data"))) bus_initialized[I2C_BUS_MAX] =
{ [0 ... (I2C_BUS_MAX-1)] = 0 };
static unsigned int __attribute__((section (".data"))) current_bus = 0;
void i2c_init(int speed, int slaveadd)
static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
{
struct i2c *i2c_base = omap24_get_base(adap);
int psc, fsscll, fssclh;
int hsscll = 0, hssclh = 0;
u32 scll, sclh;
@ -163,16 +156,15 @@ void i2c_init(int speed, int slaveadd)
I2C_IE_NACK_IE | I2C_IE_AL_IE, &i2c_base->ie);
#endif
udelay(1000);
flush_fifo();
flush_fifo(adap);
writew(0xFFFF, &i2c_base->stat);
writew(0, &i2c_base->cnt);
if (gd->flags & GD_FLG_RELOC)
bus_initialized[current_bus] = 1;
}
static void flush_fifo(void)
{ u16 stat;
static void flush_fifo(struct i2c_adapter *adap)
{
struct i2c *i2c_base = omap24_get_base(adap);
u16 stat;
/* note: if you try and read data when its not there or ready
* you get a bus error
@ -192,8 +184,9 @@ static void flush_fifo(void)
* i2c_probe: Use write access. Allows to identify addresses that are
* write-only (like the config register of dual-port EEPROMs)
*/
int i2c_probe(uchar chip)
static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip)
{
struct i2c *i2c_base = omap24_get_base(adap);
u16 status;
int res = 1; /* default = fail */
@ -201,7 +194,7 @@ int i2c_probe(uchar chip)
return res;
/* Wait until bus is free */
if (wait_for_bb())
if (wait_for_bb(adap))
return res;
/* No data transfer, slave addr only */
@ -212,7 +205,7 @@ int i2c_probe(uchar chip)
writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
I2C_CON_STP, &i2c_base->con);
status = wait_for_event();
status = wait_for_event(adap);
if ((status & ~I2C_STAT_XRDY) == 0 || (status & I2C_STAT_AL)) {
/*
@ -223,7 +216,7 @@ int i2c_probe(uchar chip)
*/
if (status == I2C_STAT_XRDY)
printf("i2c_probe: pads on bus %d probably not configured (status=0x%x)\n",
current_bus, status);
adap->hwadapnr, status);
goto pr_exit;
}
@ -239,7 +232,7 @@ int i2c_probe(uchar chip)
I2C_CON_STP, &i2c_base->con); /* STP */
}
pr_exit:
flush_fifo();
flush_fifo(adap);
writew(0xFFFF, &i2c_base->stat);
writew(0, &i2c_base->cnt);
return res;
@ -258,8 +251,10 @@ pr_exit:
* or that do not need a register address at all (such as some clock
* distributors).
*/
int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
int alen, uchar *buffer, int len)
{
struct i2c *i2c_base = omap24_get_base(adap);
int i2c_error = 0;
u16 status;
@ -287,7 +282,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
}
/* Wait until bus not busy */
if (wait_for_bb())
if (wait_for_bb(adap))
return 1;
/* Zero, one or two bytes reg address (offset) */
@ -308,12 +303,12 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
#endif
/* Send register offset */
while (1) {
status = wait_for_event();
status = wait_for_event(adap);
/* Try to identify bus that is not padconf'd for I2C */
if (status == I2C_STAT_XRDY) {
i2c_error = 2;
printf("i2c_read (addr phase): pads on bus %d probably not configured (status=0x%x)\n",
current_bus, status);
adap->hwadapnr, status);
goto rd_exit;
}
if (status == 0 || status & I2C_STAT_NACK) {
@ -348,7 +343,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
/* Receive data */
while (1) {
status = wait_for_event();
status = wait_for_event(adap);
/*
* Try to identify bus that is not padconf'd for I2C. This
* state could be left over from previous transactions if
@ -357,7 +352,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
if (status == I2C_STAT_XRDY) {
i2c_error = 2;
printf("i2c_read (data phase): pads on bus %d probably not configured (status=0x%x)\n",
current_bus, status);
adap->hwadapnr, status);
goto rd_exit;
}
if (status == 0 || status & I2C_STAT_NACK) {
@ -375,15 +370,17 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
}
rd_exit:
flush_fifo();
flush_fifo(adap);
writew(0xFFFF, &i2c_base->stat);
writew(0, &i2c_base->cnt);
return i2c_error;
}
/* i2c_write: Address (reg offset) may be 0, 1 or 2 bytes long. */
int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
static int omap24_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
int alen, uchar *buffer, int len)
{
struct i2c *i2c_base = omap24_get_base(adap);
int i;
u16 status;
int i2c_error = 0;
@ -415,7 +412,7 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
}
/* Wait until bus not busy */
if (wait_for_bb())
if (wait_for_bb(adap))
return 1;
/* Start address phase - will write regoffset + len bytes data */
@ -428,12 +425,12 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
while (alen) {
/* Must write reg offset (one or two bytes) */
status = wait_for_event();
status = wait_for_event(adap);
/* Try to identify bus that is not padconf'd for I2C */
if (status == I2C_STAT_XRDY) {
i2c_error = 2;
printf("i2c_write: pads on bus %d probably not configured (status=0x%x)\n",
current_bus, status);
adap->hwadapnr, status);
goto wr_exit;
}
if (status == 0 || status & I2C_STAT_NACK) {
@ -455,7 +452,7 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
}
/* Address phase is over, now write data */
for (i = 0; i < len; i++) {
status = wait_for_event();
status = wait_for_event(adap);
if (status == 0 || status & I2C_STAT_NACK) {
i2c_error = 1;
printf("i2c_write: error waiting for data ACK (status=0x%x)\n",
@ -474,7 +471,7 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
}
wr_exit:
flush_fifo();
flush_fifo(adap);
writew(0xFFFF, &i2c_base->stat);
writew(0, &i2c_base->cnt);
return i2c_error;
@ -484,8 +481,9 @@ wr_exit:
* Wait for the bus to be free by checking the Bus Busy (BB)
* bit to become clear
*/
static int wait_for_bb(void)
static int wait_for_bb(struct i2c_adapter *adap)
{
struct i2c *i2c_base = omap24_get_base(adap);
int timeout = I2C_TIMEOUT;
u16 stat;
@ -514,8 +512,9 @@ static int wait_for_bb(void)
* Wait for the I2C controller to complete current action
* and update status
*/
static u16 wait_for_event(void)
static u16 wait_for_event(struct i2c_adapter *adap)
{
struct i2c *i2c_base = omap24_get_base(adap);
u16 status;
int timeout = I2C_TIMEOUT;
@ -540,7 +539,7 @@ static u16 wait_for_event(void)
* not been configured for I2C, and/or pull-ups are missing.
*/
printf("Check if pads/pull-ups of bus %d are properly configured\n",
current_bus);
adap->hwadapnr);
writew(0xFFFF, &i2c_base->stat);
status = 0;
}
@ -548,48 +547,93 @@ static u16 wait_for_event(void)
return status;
}
int i2c_set_bus_num(unsigned int bus)
static struct i2c *omap24_get_base(struct i2c_adapter *adap)
{
if (bus >= I2C_BUS_MAX) {
printf("Bad bus: %x\n", bus);
return -1;
}
switch (bus) {
default:
bus = 0; /* Fall through */
switch (adap->hwadapnr) {
case 0:
i2c_base = (struct i2c *)I2C_BASE1;
return (struct i2c *)I2C_BASE1;
break;
case 1:
i2c_base = (struct i2c *)I2C_BASE2;
return (struct i2c *)I2C_BASE2;
break;
#if (I2C_BUS_MAX > 2)
case 2:
i2c_base = (struct i2c *)I2C_BASE3;
return (struct i2c *)I2C_BASE3;
break;
#if (I2C_BUS_MAX > 3)
case 3:
i2c_base = (struct i2c *)I2C_BASE4;
return (struct i2c *)I2C_BASE4;
break;
#if (I2C_BUS_MAX > 4)
case 4:
i2c_base = (struct i2c *)I2C_BASE5;
return (struct i2c *)I2C_BASE5;
break;
#endif
#endif
#endif
default:
printf("wrong hwadapnr: %d\n", adap->hwadapnr);
break;
}
current_bus = bus;
if (!bus_initialized[current_bus])
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
return 0;
return NULL;
}
int i2c_get_bus_num(void)
{
return (int) current_bus;
}
#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED1)
#define CONFIG_SYS_OMAP24_I2C_SPEED1 CONFIG_SYS_OMAP24_I2C_SPEED
#endif
#if !defined(CONFIG_SYS_OMAP24_I2C_SLAVE1)
#define CONFIG_SYS_OMAP24_I2C_SLAVE1 CONFIG_SYS_OMAP24_I2C_SLAVE
#endif
U_BOOT_I2C_ADAP_COMPLETE(omap24_0, omap24_i2c_init, omap24_i2c_probe,
omap24_i2c_read, omap24_i2c_write, NULL,
CONFIG_SYS_OMAP24_I2C_SPEED,
CONFIG_SYS_OMAP24_I2C_SLAVE,
0)
U_BOOT_I2C_ADAP_COMPLETE(omap24_1, omap24_i2c_init, omap24_i2c_probe,
omap24_i2c_read, omap24_i2c_write, NULL,
CONFIG_SYS_OMAP24_I2C_SPEED1,
CONFIG_SYS_OMAP24_I2C_SLAVE1,
1)
#if (I2C_BUS_MAX > 2)
#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED2)
#define CONFIG_SYS_OMAP24_I2C_SPEED2 CONFIG_SYS_OMAP24_I2C_SPEED
#endif
#if !defined(CONFIG_SYS_OMAP24_I2C_SLAVE2)
#define CONFIG_SYS_OMAP24_I2C_SLAVE2 CONFIG_SYS_OMAP24_I2C_SLAVE
#endif
U_BOOT_I2C_ADAP_COMPLETE(omap24_2, omap24_i2c_init, omap24_i2c_probe,
omap24_i2c_read, omap24_i2c_write, NULL,
CONFIG_SYS_OMAP24_I2C_SPEED2,
CONFIG_SYS_OMAP24_I2C_SLAVE2,
2)
#if (I2C_BUS_MAX > 3)
#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED3)
#define CONFIG_SYS_OMAP24_I2C_SPEED3 CONFIG_SYS_OMAP24_I2C_SPEED
#endif
#if !defined(CONFIG_SYS_OMAP24_I2C_SLAVE3)
#define CONFIG_SYS_OMAP24_I2C_SLAVE3 CONFIG_SYS_OMAP24_I2C_SLAVE
#endif
U_BOOT_I2C_ADAP_COMPLETE(omap24_3, omap24_i2c_init, omap24_i2c_probe,
omap24_i2c_read, omap24_i2c_write, NULL,
CONFIG_SYS_OMAP24_I2C_SPEED3,
CONFIG_SYS_OMAP24_I2C_SLAVE3,
3)
#if (I2C_BUS_MAX > 4)
#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED4)
#define CONFIG_SYS_OMAP24_I2C_SPEED4 CONFIG_SYS_OMAP24_I2C_SPEED
#endif
#if !defined(CONFIG_SYS_OMAP24_I2C_SLAVE4)
#define CONFIG_SYS_OMAP24_I2C_SLAVE4 CONFIG_SYS_OMAP24_I2C_SLAVE
#endif
U_BOOT_I2C_ADAP_COMPLETE(omap24_4, omap24_i2c_init, omap24_i2c_probe,
omap24_i2c_read, omap24_i2c_write, NULL,
CONFIG_SYS_OMAP24_I2C_SPEED4,
CONFIG_SYS_OMAP24_I2C_SLAVE4,
4)
#endif
#endif
#endif

1
include/configs/am335x_evm.h
View File

@ -183,7 +183,6 @@
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
#define CONFIG_BAUDRATE 115200
/* I2C Configuration */
#define CONFIG_CMD_EEPROM
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */

8
include/configs/am3517_crane.h
View File

@ -142,10 +142,10 @@
#undef CONFIG_CMD_IMLS /* List all found images */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_HARD_I2C 1
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_DRIVER_OMAP34XX_I2C 1
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS

8
include/configs/am3517_evm.h
View File

@ -136,10 +136,10 @@
#undef CONFIG_CMD_IMLS /* List all found images */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_HARD_I2C 1
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_DRIVER_OMAP34XX_I2C 1
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS

8
include/configs/cm_t35.h
View File

@ -141,10 +141,10 @@
#undef CONFIG_CMD_IMLS /* List all found images */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_DRIVER_OMAP34XX_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
#define CONFIG_I2C_MULTI_BUS

8
include/configs/devkit8000.h
View File

@ -90,10 +90,10 @@
#define CONFIG_DOS_PARTITION 1
/* I2C */
#define CONFIG_HARD_I2C 1
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_DRIVER_OMAP34XX_I2C 1
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/* TWL4030 */
#define CONFIG_TWL4030_POWER 1

8
include/configs/dig297.h
View File

@ -123,10 +123,10 @@
#undef CONFIG_CMD_NFS /* NFS support */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_DRIVER_OMAP34XX_I2C 1
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/*
* TWL4030

8
include/configs/mcx.h
View File

@ -137,10 +137,10 @@
#undef CONFIG_CMD_IMLS /* List all found images */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_DRIVER_OMAP34XX_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/* RTC */
#define CONFIG_RTC_DS1337

8
include/configs/nokia_rx51.h
View File

@ -157,10 +157,10 @@
#undef CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
#define CONFIG_OMAP3_SPI
#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_DRIVER_OMAP34XX_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/*
* TWL4030

9
include/configs/omap3_beagle.h
View File

@ -161,11 +161,10 @@
#undef CONFIG_CMD_IMLS /* List all found images */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_HARD_I2C 1
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_I2C_MULTI_BUS 1
#define CONFIG_DRIVER_OMAP34XX_I2C 1
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_VIDEO_OMAP3 /* DSS Support */
/*

9
include/configs/omap3_evm_common.h
View File

@ -87,11 +87,10 @@
/*
* I2C
*/
#define CONFIG_HARD_I2C
#define CONFIG_DRIVER_OMAP34XX_I2C
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/*
* PISMO support

8
include/configs/omap3_igep00x0.h
View File

@ -124,10 +124,10 @@
#undef CONFIG_CMD_IMLS /* List all found images */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_HARD_I2C 1
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_DRIVER_OMAP34XX_I2C 1
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
/*
* TWL4030

10
include/configs/omap3_logic.h
View File

@ -118,12 +118,10 @@
/*
* I2C
*/
#define CONFIG_HARD_I2C
#define CONFIG_DRIVER_OMAP34XX_I2C
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/*
* TWL4030

9
include/configs/omap3_mvblx.h
View File

@ -128,11 +128,10 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_FPGA
#define CONFIG_HARD_I2C 1
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 0
#define CONFIG_DRIVER_OMAP34XX_I2C 1
#define CONFIG_I2C_MULTI_BUS 1
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/*
* TWL4030

9
include/configs/omap3_overo.h
View File

@ -98,11 +98,10 @@
#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_DRIVER_OMAP34XX_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/*
* TWL4030

8
include/configs/omap3_pandora.h
View File

@ -111,10 +111,10 @@
#undef CONFIG_CMD_NFS /* NFS support */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_HARD_I2C 1
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_DRIVER_OMAP34XX_I2C 1
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/*
* TWL4030

8
include/configs/omap3_sdp3430.h
View File

@ -114,10 +114,10 @@
/*
* I2C for power management setup
*/
#define CONFIG_HARD_I2C 1
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_DRIVER_OMAP34XX_I2C 1
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/* OMITTED: single 1 Gbit MT29F1G NAND flash */

8
include/configs/omap3_zoom1.h
View File

@ -118,10 +118,10 @@
#undef CONFIG_CMD_NFS /* NFS support */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_HARD_I2C 1
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_DRIVER_OMAP34XX_I2C 1
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/*
* TWL4030

8
include/configs/omap3_zoom2.h
View File

@ -138,10 +138,10 @@
#undef CONFIG_CMD_NFS /* NFS support */
#define CONFIG_SYS_NO_FLASH
#define CONFIG_HARD_I2C 1
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_DRIVER_OMAP34XX_I2C 1
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/*
* TWL4030

9
include/configs/pcm051.h
View File

@ -172,11 +172,10 @@
/* I2C Configuration */
#define CONFIG_I2C
#define CONFIG_CMD_I2C
#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_DRIVER_OMAP24XX_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP24XX
#define CONFIG_CMD_EEPROM
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */

9
include/configs/siemens-am33x-common.h
View File

@ -131,11 +131,10 @@
/* I2C Configuration */
#define CONFIG_I2C
#define CONFIG_CMD_I2C
#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_DRIVER_OMAP24XX_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED OMAP_I2C_STANDARD
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP24XX
/* Defines for SPL */
#define CONFIG_SPL

11
include/configs/tam3517-common.h
View File

@ -117,14 +117,13 @@
#undef CONFIG_CMD_IMLS
#define CONFIG_SYS_NO_FLASH
#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SPEED 400000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
#define CONFIG_DRIVER_OMAP34XX_I2C
/*
* Board NAND Info.
@ -369,7 +368,7 @@ struct tam3517_module_info {
#define TAM3517_READ_EEPROM(info, ret) \
do { \
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); \
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
(void *)info, sizeof(*info))) \
ret = 1; \

9
include/configs/ti_armv7_common.h
View File

@ -59,12 +59,11 @@
/* I2C IP block */
#define CONFIG_I2C
#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_DRIVER_OMAP24XX_I2C
#define CONFIG_CMD_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP24XX
/* MMC/SD IP block */
#define CONFIG_MMC

10
include/configs/tricorder.h
View File

@ -98,11 +98,11 @@
#define CONFIG_DOS_PARTITION
/* I2C */
#define CONFIG_HARD_I2C
#define CONFIG_SYS_I2C_SPEED 100000
#define CONFIG_SYS_I2C_SLAVE 1
#define CONFIG_DRIVER_OMAP34XX_I2C 1
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
#define CONFIG_SYS_I2C_OMAP34XX
/* EEPROM */
#define CONFIG_SYS_I2C_MULTI_EEPROMS