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OMAP3: Add SPL support to omap3_evm

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Add Hynix 200MHz timing information to <asm/arch-omap3/mem.h>.
This also changes CONFIG_SYS_TEXT_BASE to 0x80100000.

Signed-off-by: Tom Rini <trini@ti.com>
This commit is contained in:
Tom Rini
2011-11-18 12:48:09 +00:00
committed by Albert ARIBAUD
parent 75c57a3570
commit 673283f3fc
7 changed files with 159 additions and 38 deletions
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33
board/ti/evm/config.mk
View File

@@ -1,33 +0,0 @@
#
# (C) Copyright 2006 - 2008
# Texas Instruments, <www.ti.com>
#
# EVM uses OMAP3 (ARM-CortexA8) cpu
# see http://www.ti.com/ for more information on Texas Instruments
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
# Physical Address:
# 8000'0000 (bank0)
# A000/0000 (bank1)
# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
# (mem base + reserved)
# For use with external or internal boots.
CONFIG_SYS_TEXT_BASE = 0x80008000

41
board/ti/evm/evm.c
View File

@@ -1,5 +1,5 @@
/*
* (C) Copyright 2004-2008
* (C) Copyright 2004-2011
* Texas Instruments, <www.ti.com>
*
* Author :
@@ -37,6 +37,7 @@
#include <asm/gpio.h>
#include <i2c.h>
#include <asm/mach-types.h>
#include <linux/mtd/nand.h>
#include "evm.h"
#define OMAP3EVM_GPIO_ETH_RST_GEN1 64
@@ -119,6 +120,42 @@ int board_init(void)
return 0;
}
#ifdef CONFIG_SPL_BUILD
/*
* Routine: get_board_mem_timings
* Description: If we use SPL then there is no x-loader nor config header
* so we have to setup the DDR timings ourself on the first bank. This
* provides the timing values back to the function that configures
* the memory.
*/
void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl,
u32 *mr)
{
int pop_mfr, pop_id;
/*
* We need to identify what PoP memory is on the board so that
* we know what timings to use. To map the ID values please see
* nand_ids.c
*/
identify_nand_chip(&pop_mfr, &pop_id);
if (pop_mfr == NAND_MFR_HYNIX && pop_id == 0xbc) {
/* 256MB DDR */
*mcfg = HYNIX_V_MCFG_200(256 << 20);
*ctrla = HYNIX_V_ACTIMA_200;
*ctrlb = HYNIX_V_ACTIMB_200;
} else {
/* 128MB DDR */
*mcfg = MICRON_V_MCFG_165(128 << 20);
*ctrla = MICRON_V_ACTIMA_165;
*ctrlb = MICRON_V_ACTIMB_165;
}
*rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
*mr = MICRON_V_MR_165;
}
#endif
/*
* Routine: misc_init_r
* Description: Init ethernet (done here so udelay works)
@@ -238,7 +275,7 @@ int board_eth_init(bd_t *bis)
}
#endif /* CONFIG_CMD_NET */
#ifdef CONFIG_GENERIC_MMC
#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
int board_mmc_init(bd_t *bis)
{
omap_mmc_init(0);