OMAP3: Add SPL support to omap3_evm

Add Hynix 200MHz timing information to <asm/arch-omap3/mem.h>.
This also changes CONFIG_SYS_TEXT_BASE to 0x80100000.

Signed-off-by: Tom Rini <trini@ti.com>
This commit is contained in:
Tom Rini
2011-11-18 12:48:09 +00:00
committed by Albert ARIBAUD
parent 75c57a3570
commit 673283f3fc
7 changed files with 159 additions and 38 deletions

View File

@@ -123,6 +123,32 @@ enum {
V_MCFG_BANKALLOCATION_RBC | \
V_MCFG_B32NOT16_32 | V_MCFG_DEEPPD_EN | V_MCFG_RAMTYPE_DDR
/* Hynix part of AM/DM37xEVM (200MHz optimized) */
#define HYNIX_TDAL_200 6
#define HYNIX_TDPL_200 3
#define HYNIX_TRRD_200 2
#define HYNIX_TRCD_200 4
#define HYNIX_TRP_200 3
#define HYNIX_TRAS_200 8
#define HYNIX_TRC_200 11
#define HYNIX_TRFC_200 18
#define HYNIX_V_ACTIMA_200 \
ACTIM_CTRLA(HYNIX_TRFC_200, HYNIX_TRC_200, \
HYNIX_TRAS_200, HYNIX_TRP_200, \
HYNIX_TRCD_200, HYNIX_TRRD_200, \
HYNIX_TDPL_200, HYNIX_TDAL_200)
#define HYNIX_TWTR_200 2
#define HYNIX_TCKE_200 1
#define HYNIX_TXP_200 1
#define HYNIX_XSR_200 28
#define HYNIX_V_ACTIMB_200 \
ACTIM_CTRLB(HYNIX_TWTR_200, HYNIX_TCKE_200, \
HYNIX_TXP_200, HYNIX_XSR_200)
#define HYNIX_RASWIDTH_200 0x3
#define HYNIX_V_MCFG_200(size) MCFG((size), HYNIX_RASWIDTH_200)
/* Infineon part of 3430SDP (165MHz optimized) 6.06ns */
#define INFINEON_TDAL_165 6 /* Twr/Tck + Trp/tck */
/* 15/6 + 18/6 = 5.5 -> 6 */