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Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze

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This commit is contained in:
Tom Rini
2015-07-28 11:31:21 -04:00
parent 0a0db402d1 711e5e26b4
commit 66d10c18bf
32 changed files with 1427 additions and 117 deletions
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16
arch/arm/include/asm/arch-zynqmp/hardware.h
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@@ -11,6 +11,11 @@
#define ZYNQ_SERIAL_BASEADDR0 0xFF000000
#define ZYNQ_SERIAL_BASEADDR1 0xFF001000
#define ZYNQ_GEM_BASEADDR0 0xFF0B0000
#define ZYNQ_GEM_BASEADDR1 0xFF0C0000
#define ZYNQ_GEM_BASEADDR2 0xFF0D0000
#define ZYNQ_GEM_BASEADDR3 0xFF0E0000
#define ZYNQ_SPI_BASEADDR0 0xFF040000
#define ZYNQ_SPI_BASEADDR1 0xFF050000
@@ -20,6 +25,8 @@
#define ZYNQ_SDHCI_BASEADDR0 0xFF160000
#define ZYNQ_SDHCI_BASEADDR1 0xFF170000
#define ZYNQMP_SATA_BASEADDR 0xFD0C0000
#define ZYNQMP_CRL_APB_BASEADDR 0xFF5E0000
#define ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT 0x1000000
@@ -55,6 +62,15 @@ struct iou_scntr {
#define EMMC_MODE 0x00000006
#define JTAG_MODE 0x00000000
#define ZYNQMP_IOU_SLCR_BASEADDR 0xFF180000
struct iou_slcr_regs {
u32 mio_pin[78];
u32 reserved[442];
};
#define slcr_base ((struct iou_slcr_regs *)ZYNQMP_IOU_SLCR_BASEADDR)
#define ZYNQMP_RPU_BASEADDR 0xFF9A0000
struct rpu_regs {

6
arch/arm/include/asm/arch-zynqmp/sys_proto.h
View File

@@ -8,7 +8,13 @@
#ifndef _ASM_ARCH_SYS_PROTO_H
#define _ASM_ARCH_SYS_PROTO_H
/* Setup clk for network */
static inline void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate)
{
}
int zynq_sdhci_init(unsigned long regbase);
int zynq_slcr_get_mio_pin_status(const char *periph);
unsigned int zynqmp_get_silicon_version(void);