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MIPS: add support for Broadcom MIPS BCM6328 SoC family

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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
Álvaro Fernández Rojas 2017-04-25 00:39:23 +02:00 committed by Daniel Schwierzeck
parent 4a2b2724a2
commit 6471a225e7
3 changed files with 125 additions and 0 deletions
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88
arch/mips/dts/brcm,bcm6328.dtsi Normal file
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@ -0,0 +1,88 @@
/*
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <dt-bindings/gpio/gpio.h>
#include "skeleton.dtsi"
/ {
compatible = "brcm,bcm6328";
cpus {
reg = <0x10000000 0x4>;
#address-cells = <1>;
#size-cells = <0>;
u-boot,dm-pre-reloc;
cpu@0 {
compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
device_type = "cpu";
reg = <0>;
u-boot,dm-pre-reloc;
};
cpu@1 {
compatible = "brcm,bcm6328-cpu", "mips,mips4Kc";
device_type = "cpu";
reg = <1>;
u-boot,dm-pre-reloc;
};
};
clocks {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
u-boot,dm-pre-reloc;
periph_osc: periph-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
u-boot,dm-pre-reloc;
};
};
ubus {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
u-boot,dm-pre-reloc;
pll_cntl: syscon@10000068 {
compatible = "syscon";
reg = <0x10000068 0x4>;
};
syscon-reboot {
compatible = "syscon-reboot";
regmap = <&pll_cntl>;
offset = <0x0>;
mask = <0x1>;
};
uart0: serial@10000100 {
compatible = "brcm,bcm6345-uart";
reg = <0x10000100 0x18>;
clocks = <&periph_osc>;
status = "disabled";
};
uart1: serial@10000120 {
compatible = "brcm,bcm6345-uart";
reg = <0x10000120 0x18>;
clocks = <&periph_osc>;
status = "disabled";
};
memory-controller@10003000 {
compatible = "brcm,bcm6328-mc";
reg = <0x10003000 0x1000>;
u-boot,dm-pre-reloc;
};
};
};

12
arch/mips/mach-bmips/Kconfig
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@ -2,11 +2,23 @@ menu "Broadcom MIPS platforms"
depends on ARCH_BMIPS
config SYS_SOC
default "bcm6328" if SOC_BMIPS_BCM6328
default "bcm6358" if SOC_BMIPS_BCM6358
choice
prompt "Broadcom MIPS SoC select"
config SOC_BMIPS_BCM6328
bool "BMIPS BCM6328 family"
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
select MIPS_TUNE_4KC
select MIPS_L1_CACHE_SHIFT_4
select SWAP_IO_SPACE
select SYSRESET_SYSCON
help
This supports BMIPS BCM6328 family including BCM63281 and BCM63283.
config SOC_BMIPS_BCM6358
bool "BMIPS BCM6358 family"
select SUPPORTS_BIG_ENDIAN

25
include/configs/bmips_bcm6328.h Normal file
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@ -0,0 +1,25 @@
/*
* Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef __CONFIG_BMIPS_BCM6328_H
#define __CONFIG_BMIPS_BCM6328_H
/* CPU */
#define CONFIG_SYS_MIPS_TIMER_FREQ 160000000
/* RAM */
#define CONFIG_NR_DRAM_BANKS 1
#define CONFIG_SYS_SDRAM_BASE 0x80000000
/* U-Boot */
#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000
#if defined(CONFIG_BMIPS_BOOT_RAM)
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_SYS_INIT_SP_OFFSET 0x2000
#endif
#endif /* __CONFIG_BMIPS_BCM6328_H */