arm: socfpga: pl310: Map SDRAM to 0x0
Configure the PL310 address filter to make sure DRAM is mapped to 0x0. This code also configures the "remap" register of NIC-301 and sets the required 'mpuzero' bit. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
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@ -12,11 +12,17 @@
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#include <asm/arch/reset_manager.h>
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#include <asm/arch/system_manager.h>
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#include <asm/arch/dwmmc.h>
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#include <asm/arch/nic301.h>
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#include <asm/pl310.h>
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DECLARE_GLOBAL_DATA_PTR;
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static struct pl310_regs *const pl310 =
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(struct pl310_regs *)CONFIG_SYS_PL310_BASE;
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static struct socfpga_system_manager *sysmgr_regs =
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(struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
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static struct nic301_registers *nic301_regs =
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(struct nic301_registers *)SOCFPGA_L3REGS_ADDRESS;
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int dram_init(void)
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{
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@ -142,6 +148,14 @@ int arch_cpu_init(void)
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int misc_init_r(void)
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{
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/* Configure the L2 controller to make SDRAM start at 0 */
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#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
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writel(0x2, &nic301_regs->remap);
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#else
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writel(0x1, &nic301_regs->remap); /* remap.mpuzero */
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writel(0x1, &pl310->pl310_addr_filter_start);
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#endif
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/* Add device descriptor to FPGA device table */
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socfpga_fpga_add();
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return 0;
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