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arm: dts: k3-am654-base-board-u-boot: change cpsw2g interface mode to rgmii-rxid

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The AM654 SoC doesn't allow to disabling RGMII TX internal delay in CPSW2G
MAC. Hence, change CPSW2G interface mode to "rgmii-rxid" - RGMII with
internal RX delay provided by the PHY, the MAC will add an TX delay in this
case.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This commit is contained in:
Grygorii Strashko 2019-11-18 23:04:47 +02:00 committed by Joe Hershberger
parent 37d6265f2b
commit 5efb69298b
1 changed files with 1 additions and 2 deletions
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3
arch/arm/dts/k3-am654-base-board-u-boot.dtsi
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@ -336,13 +336,12 @@
reg = <0>;
/* TODO: phy reset: TCA9555RTWR(i2c:0x21)[p04].GPIO_MCU_RGMII_RSTN */
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
};
};
&cpsw_port1 {
phy-mode = "rgmii-id";
phy-mode = "rgmii-rxid";
phy-handle = <&phy0>;
};