arch: arm: dts: imxrt1050-evk: add lcdif node
Add lcdif node and its pinctrl. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com> Reviewed-by: Anatolij Gustschin <agust@denx.de>
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@ -185,6 +185,33 @@
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0x17061
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>;
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};
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pinctrl_lcdif: lcdifgrp {
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u-boot,dm-spl;
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fsl,pins = <
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MXRT1050_IOMUXC_GPIO_B0_00_LCD_CLK 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B0_01_LCD_ENABLE 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B0_02_LCD_HSYNC 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B0_03_LCD_VSYNC 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B0_04_LCD_DATA00 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B0_05_LCD_DATA01 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B0_06_LCD_DATA02 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B0_07_LCD_DATA03 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B0_08_LCD_DATA04 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B0_09_LCD_DATA05 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B0_10_LCD_DATA06 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B0_11_LCD_DATA07 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B0_12_LCD_DATA08 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B0_13_LCD_DATA09 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B0_14_LCD_DATA10 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B0_15_LCD_DATA11 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B1_01_LCD_DATA13 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B1_02_LCD_DATA14 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B1_03_LCD_DATA15 0x1b0b1
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MXRT1050_IOMUXC_GPIO_B1_15_GPIO2_IO31 0x0b069
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MXRT1050_IOMUXC_GPIO_AD_B0_02_GPIO1_IO02 0x0b069
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>;
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};
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};
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};
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@ -198,3 +225,36 @@
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cd-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
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};
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&lcdif {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lcdif>;
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display = <&display0>;
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status = "okay";
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assigned-clocks = <&clks IMXRT1050_CLK_LCDIF_SEL>;
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assigned-clock-parents = <&clks IMXRT1050_CLK_PLL5_VIDEO>;
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display0: display0 {
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bits-per-pixel = <16>;
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bus-width = <16>;
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display-timings {
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timing0: timing0 {
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clock-frequency = <9300000>;
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hactive = <480>;
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vactive = <272>;
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hback-porch = <4>;
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hfront-porch = <8>;
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vback-porch = <4>;
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vfront-porch = <8>;
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hsync-len = <41>;
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vsync-len = <10>;
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de-active = <1>;
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pixelclk-active = <0>;
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hsync-active = <0>;
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vsync-active = <0>;
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};
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};
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};
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};
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