dm: usb: exynos: Adjust XHCI driver to support driver model
Support driver model in the exynos XHCI driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
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@ -14,6 +14,7 @@
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*/
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#include <common.h>
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#include <dm.h>
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#include <fdtdec.h>
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#include <libfdt.h>
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#include <malloc.h>
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@ -32,20 +33,76 @@
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/* Declare global data pointer */
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DECLARE_GLOBAL_DATA_PTR;
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#ifdef CONFIG_DM_USB
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struct exynos_xhci_platdata {
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fdt_addr_t hcd_base;
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fdt_addr_t phy_base;
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struct gpio_desc vbus_gpio;
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};
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#endif
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/**
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* Contains pointers to register base addresses
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* for the usb controller.
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*/
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struct exynos_xhci {
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#ifdef CONFIG_DM_USB
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struct usb_platdata usb_plat;
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#endif
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struct xhci_ctrl ctrl;
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struct exynos_usb3_phy *usb3_phy;
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struct xhci_hccr *hcd;
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struct dwc3 *dwc3_reg;
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#ifndef CONFIG_DM_USB
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struct gpio_desc vbus_gpio;
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#endif
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};
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#ifndef CONFIG_DM_USB
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static struct exynos_xhci exynos;
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#endif
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#ifdef CONFIG_OF_CONTROL
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#ifdef CONFIG_DM_USB
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static int xhci_usb_ofdata_to_platdata(struct udevice *dev)
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{
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struct exynos_xhci_platdata *plat = dev_get_platdata(dev);
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const void *blob = gd->fdt_blob;
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unsigned int node;
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int depth;
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/*
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* Get the base address for XHCI controller from the device node
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*/
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plat->hcd_base = fdtdec_get_addr(blob, dev->of_offset, "reg");
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if (plat->hcd_base == FDT_ADDR_T_NONE) {
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debug("Can't get the XHCI register base address\n");
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return -ENXIO;
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}
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depth = 0;
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node = fdtdec_next_compatible_subnode(blob, dev->of_offset,
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COMPAT_SAMSUNG_EXYNOS5_USB3_PHY, &depth);
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if (node <= 0) {
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debug("XHCI: Can't get device node for usb3-phy controller\n");
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return -ENODEV;
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}
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/*
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* Get the base address for usbphy from the device node
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*/
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plat->phy_base = fdtdec_get_addr(blob, node, "reg");
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if (plat->phy_base == FDT_ADDR_T_NONE) {
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debug("Can't get the usbphy register address\n");
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return -ENXIO;
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}
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/* Vbus gpio */
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gpio_request_by_name(dev, "samsung,vbus-gpio", 0,
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&plat->vbus_gpio, GPIOD_IS_OUT);
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return 0;
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}
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#else
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static int exynos_usb3_parse_dt(const void *blob, struct exynos_xhci *exynos)
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{
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fdt_addr_t addr;
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@ -283,6 +340,7 @@ static void exynos_xhci_core_exit(struct exynos_xhci *exynos)
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exynos5_usb3_phy_exit(exynos->usb3_phy);
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}
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#ifndef CONFIG_DM_USB
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int xhci_hcd_init(int index, struct xhci_hccr **hccr, struct xhci_hcor **hcor)
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{
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struct exynos_xhci *ctx = &exynos;
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@ -326,3 +384,63 @@ void xhci_hcd_stop(int index)
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exynos_xhci_core_exit(ctx);
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}
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#endif
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#ifdef CONFIG_DM_USB
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static int xhci_usb_probe(struct udevice *dev)
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{
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struct exynos_xhci_platdata *plat = dev_get_platdata(dev);
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struct exynos_xhci *ctx = dev_get_priv(dev);
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struct xhci_hcor *hcor;
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int ret;
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ctx->hcd = (struct xhci_hccr *)plat->hcd_base;
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ctx->usb3_phy = (struct exynos_usb3_phy *)plat->phy_base;
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ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET);
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hcor = (struct xhci_hcor *)((uint32_t)ctx->hcd +
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HC_LENGTH(xhci_readl(&ctx->hcd->cr_capbase)));
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/* setup the Vbus gpio here */
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if (dm_gpio_is_valid(&plat->vbus_gpio))
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dm_gpio_set_value(&plat->vbus_gpio, 1);
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ret = exynos_xhci_core_init(ctx);
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if (ret) {
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puts("XHCI: failed to initialize controller\n");
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return -EINVAL;
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}
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return xhci_register(dev, ctx->hcd, hcor);
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}
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static int xhci_usb_remove(struct udevice *dev)
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{
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struct exynos_xhci *ctx = dev_get_priv(dev);
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int ret;
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ret = xhci_deregister(dev);
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if (ret)
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return ret;
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exynos_xhci_core_exit(ctx);
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return 0;
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}
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static const struct udevice_id xhci_usb_ids[] = {
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{ .compatible = "samsung,exynos5250-xhci" },
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{ }
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};
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U_BOOT_DRIVER(usb_xhci) = {
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.name = "xhci_exynos",
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.id = UCLASS_USB,
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.of_match = xhci_usb_ids,
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.ofdata_to_platdata = xhci_usb_ofdata_to_platdata,
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.probe = xhci_usb_probe,
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.remove = xhci_usb_remove,
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.ops = &xhci_usb_ops,
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.platdata_auto_alloc_size = sizeof(struct exynos_xhci_platdata),
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.priv_auto_alloc_size = sizeof(struct exynos_xhci),
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.flags = DM_FLAG_ALLOC_PRIV_DMA,
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};
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#endif
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