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powerpc: mpc85xx: Move macro CONFIG_SYS_PPC64 to Kconfig

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Use Kconfig option SYS_PPC64 instead.

Signed-off-by: York Sun <york.sun@nxp.com>
This commit is contained in:
York Sun 2016-12-28 08:43:50 -08:00 committed by Tom Rini
parent 7371774ab9
commit 4851278e30
3 changed files with 11 additions and 6 deletions
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11
arch/powerpc/cpu/mpc85xx/Kconfig
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@ -348,6 +348,7 @@ config ARCH_B4420
select SYS_FSL_QORIQ_CHASSIS2
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
config ARCH_B4860
bool
@ -370,6 +371,7 @@ config ARCH_B4860
select SYS_FSL_QORIQ_CHASSIS2
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
config ARCH_BSC9131
bool
@ -727,6 +729,7 @@ config ARCH_P5020
select SYS_FSL_QORIQ_CHASSIS1
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
config ARCH_P5040
bool
@ -746,6 +749,7 @@ config ARCH_P5040
select SYS_FSL_QORIQ_CHASSIS1
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
config ARCH_QEMU_E500
bool
@ -833,6 +837,7 @@ config ARCH_T2080
select SYS_FSL_QORIQ_CHASSIS2
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
config ARCH_T2081
bool
@ -851,6 +856,7 @@ config ARCH_T2081
select SYS_FSL_QORIQ_CHASSIS2
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
config ARCH_T4160
bool
@ -870,6 +876,7 @@ config ARCH_T4160
select SYS_FSL_QORIQ_CHASSIS2
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
config ARCH_T4240
bool
@ -890,6 +897,7 @@ config ARCH_T4240
select SYS_FSL_QORIQ_CHASSIS2
select SYS_FSL_SEC_BE
select SYS_FSL_SEC_COMPAT_4
select SYS_PPC64
config BOOKE
bool
@ -1210,6 +1218,9 @@ config SYS_NUM_TLBCAMS
Number of TLB CAM entries for Book-E chips. 64 for E500MC,
16 for other E500 SoCs.
config SYS_PPC64
bool
config SYS_PPC_E500_USE_DEBUG_TLB
bool

5
arch/powerpc/include/asm/config_mpc85xx.h
View File

@ -172,7 +172,6 @@
#define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xff000000
#elif defined(CONFIG_ARCH_P5020) /* also supports P5010 */
#define CONFIG_SYS_PPC64 /* 64-bit core */
#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
#define CONFIG_SYS_FSL_NUM_CC_PLLS 2
#define CONFIG_SYS_NUM_FMAN 1
@ -191,7 +190,6 @@
#define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xc0000000
#elif defined(CONFIG_ARCH_P5040)
#define CONFIG_SYS_PPC64
#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
#define CONFIG_SYS_FSL_NUM_CC_PLLS 3
#define CONFIG_SYS_NUM_FMAN 2
@ -233,7 +231,6 @@
#define CONFIG_ESDHC_HC_BLK_ADDR
#elif defined(CONFIG_ARCH_T4240) || defined(CONFIG_ARCH_T4160)
#define CONFIG_SYS_PPC64 /* 64-bit core */
#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
#define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */
@ -277,7 +274,6 @@
#define CONFIG_SYS_FSL_PCI_VER_3_X
#elif defined(CONFIG_ARCH_B4860) || defined(CONFIG_ARCH_B4420)
#define CONFIG_SYS_PPC64 /* 64-bit core */
#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
#define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */
#define CONFIG_HETROGENOUS_CLUSTERS /* DSP/SC3900 core clusters */
@ -388,7 +384,6 @@
#define CONFIG_SYS_FSL_SFP_VER_3_0
#elif defined(CONFIG_ARCH_T2080) || defined(CONFIG_ARCH_T2081)
#define CONFIG_SYS_PPC64 /* 64-bit core */
#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
#define CONFIG_SYS_FSL_NUM_CC_PLLS 2

1
scripts/config_whitelist.txt
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@ -7132,7 +7132,6 @@ CONFIG_SYS_POST_WATCHDOG
CONFIG_SYS_POST_WORD_ADDR
CONFIG_SYS_POWER_MANAGER
CONFIG_SYS_PPC4XX_USB_ADDR
CONFIG_SYS_PPC64
CONFIG_SYS_PPC_DDR_WIMGE
CONFIG_SYS_PQSPAR
CONFIG_SYS_PRELIM_OR_AM