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am335x, guardian: Add support for the bosch guardian board

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Add support for the Bosch Guardian board.

CPU  : AM335X-GP rev 2.1
Model: Bosch AM335x Guardian
I2C:   ready
DRAM:  256 MiB
NAND:  512 MiB
MMC:   OMAP SD/MMC: 0

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Felix Brack <fb@ltec.ch>
This commit is contained in:
Sjoerd Simons 2019-02-25 15:33:00 +00:00 committed by Tom Rini
parent f2fae512f2
commit 4512380420
13 changed files with 1121 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/Kconfig
View File

@ -1563,6 +1563,7 @@ source "arch/arm/cpu/armv8/Kconfig"
source "arch/arm/mach-imx/Kconfig"
source "board/bosch/shc/Kconfig"
source "board/bosch/guardian/Kconfig"
source "board/CarMediaLab/flea3/Kconfig"
source "board/Marvell/aspenite/Kconfig"
source "board/Marvell/gplugd/Kconfig"

3
arch/arm/dts/Makefile
View File

@ -251,7 +251,8 @@ dtb-$(CONFIG_AM33XX) += \
am335x-pdu001.dtb \
am335x-chiliboard.dtb \
am335x-sl50.dtb \
am335x-base0033.dtb
am335x-base0033.dtb \
am335x-guardian.dtb
dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb \
am43x-epos-evm.dtb \
am437x-idk-evm.dtb \

66
arch/arm/dts/am335x-guardian-u-boot.dtsi Normal file
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@ -0,0 +1,66 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 EETS GmbH - https://www.eets.ch/
* Copyright (C) 2018 Robert Bosch Power Tools GmbH
*/
/ {
ocp {
u-boot,dm-pre-reloc;
};
};
&l4_wkup {
u-boot,dm-pre-reloc;
};
&mmc1 {
u-boot,dm-pre-reloc;
};
&mmc1_pins {
u-boot,dm-pre-reloc;
};
&rtc {
clocks = <&l4_per_clkctrl AM3_CLKDIV32K_CLKCTRL 0>;
clock-names = "int-clk";
};
&scm {
u-boot,dm-pre-reloc;
};
&uart0 {
u-boot,dm-pre-reloc;
};
&uart0_pins {
u-boot,dm-pre-reloc;
};
&usb {
u-boot,dm-pre-reloc;
};
&usb_ctrl_mod {
u-boot,dm-pre-reloc;
};
&usb0 {
u-boot,dm-pre-reloc;
};
&usb0_phy {
u-boot,dm-pre-reloc;
};
&am33xx_pinmux {
u-boot,dm-pre-reloc;
lcd0_pins: pinmux_lcd0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLUP | MUX_MODE7)
>;
};
};

509
arch/arm/dts/am335x-guardian.dts Normal file
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@ -0,0 +1,509 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
* Copyright (C) 2018 Robert Bosch Power Tools GmbH
*/
/dts-v1/;
#include "am33xx.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
model = "Bosch AM335x Guardian";
compatible = "bosch,am335x-guardian", "ti,am33xx";
chosen {
stdout-path = &uart0;
tick-timer = &timer2;
};
cpus {
cpu@0 {
cpu0-supply = <&dcdc2_reg>;
};
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
gpio_keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&gpio_keys_pins>;
button21 {
label = "guardian-power-button";
linux,code = <KEY_POWER>;
gpios = <&gpio2 21 0>;
wakeup-source;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&leds_pins>;
led1 {
label = "green:heartbeat";
gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
led2 {
label = "green:mmc0";
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
};
};
panel {
compatible = "ti,tilcdc,panel";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&lcd_pins_default &lcd_disen_pins>;
pinctrl-1 = <&lcd_pins_sleep>;
display-timings {
320x240 {
hactive = <320>;
vactive = <240>;
hback-porch = <68>;
hfront-porch = <20>;
hsync-len = <1>;
vback-porch = <18>;
vfront-porch = <4>;
vsync-len = <1>;
clock-frequency = <9000000>;
hsync-active = <0>;
vsync-active = <0>;
};
};
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;
dma-burst-sz = <16>;
bpp = <24>;
bus-width = <16>;
fdd = <0x80>;
sync-edge = <0>;
sync-ctrl = <1>;
raster-order = <0>;
fifo-th = <0>;
};
};
pwm7: dmtimer-pwm {
compatible = "ti,omap-dmtimer-pwm";
ti,timers = <&timer7>;
pinctrl-names = "default";
pinctrl-0 = <&dmtimer7_pins>;
};
vmmcsd_fixed: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&cppi41dma {
status = "okay";
};
&elm {
status = "okay";
};
&gpmc {
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins>;
ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
status = "okay";
nand@0,0 {
compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
ti,nand-ecc-opt = "bch16";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
/*
* MTD partition table
*
* All SPL-* partitions are sized to minimal length which can
* be independently programmable. For NAND flash this is equal
* to size of erase-block.
*/
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "SPL";
reg = <0x0 0x40000>;
};
partition@1 {
label = "SPL.backup1";
reg = <0x40000 0x40000>;
};
partition@2 {
label = "SPL.backup2";
reg = <0x80000 0x40000>;
};
partition@3 {
label = "SPL.backup3";
reg = <0xc0000 0x40000>;
};
partition@4 {
label = "u-boot";
reg = <0x100000 0x100000>;
};
partition@5 {
label = "u-boot.backup1";
reg = <0x200000 0x100000>;
};
partition@6 {
label = "u-boot-env";
reg = <0x300000 0x40000>;
};
partition@7 {
label = "u-boot-env.backup1";
reg = <0x340000 0x40000>;
};
partition@8 {
label = "UBI";
reg = <0x380000 0x1fc80000>;
};
};
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
clock-frequency = <400000>;
status = "okay";
tps: tps@24 {
reg = <0x24>;
};
};
&lcdc {
blue-and-red-wiring = "crossed";
status = "okay";
};
&mmc1 {
bus-width = <0x4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vmmcsd_fixed>;
status = "okay";
};
&rtc {
clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
clock-names = "ext-clk", "int-clk";
system-power-controller;
};
&spi0 {
ti,pindir-d0-out-d1-in;
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
status = "okay";
};
/include/ "tps65217.dtsi"
&tps {
ti,pmic-shutdown-controller;
interrupt-parent = <&intc>;
interrupts = <7>; /* NMI */
backlight {
isel = <1>; /* 1 - ISET1, 2 ISET2 */
fdim = <100>; /* TPS65217_BL_FDIM_100HZ */
default-brightness = <100>;
};
regulators {
dcdc1_reg: regulator@0 {
regulator-name = "vdds_dpr";
regulator-always-on;
};
dcdc2_reg: regulator@1 {
regulator-name = "vdd_mpu";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1351500>;
regulator-boot-on;
regulator-always-on;
};
dcdc3_reg: regulator@2 {
regulator-name = "vdd_core";
regulator-min-microvolt = <925000>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-always-on;
};
ldo1_reg: regulator@3 {
regulator-name = "vio,vrtc,vdds";
regulator-always-on;
};
ldo2_reg: regulator@4 {
regulator-name = "vdd_3v3aux";
regulator-always-on;
};
ldo3_reg: regulator@5 {
regulator-name = "vdd_1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
ldo4_reg: regulator@6 {
regulator-name = "vdd_3v3a";
regulator-always-on;
};
};
};
&tscadc {
status = "okay";
adc {
ti,adc-channels = <0 1 2 3 4 5 6>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&usb {
status = "okay";
};
&usb_ctrl_mod {
status = "okay";
};
&usb0 {
dr_mode = "peripheral";
status = "okay";
};
&usb0_phy {
status = "okay";
};
&usb1 {
dr_mode = "host";
status = "okay";
};
&usb1_phy {
status = "okay";
};
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&clkout2_pin &gpio_pins>;
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
>;
};
dmtimer7_pins: pinmux_dmtimer7_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x968, PIN_OUTPUT | MUX_MODE5)
>;
};
gpio_keys_pins: pinmux_gpio_keys_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE7)
>;
};
gpio_pins: pinmux_gpio_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE7)
AM33XX_IOPAD(0x990, PIN_OUTPUT | MUX_MODE7)
>;
};
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)
>;
};
lcd_disen_pins: pinmux_lcd_disen_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP | SLEWCTRL_SLOW | MUX_MODE7)
>;
};
lcd_pins_default: pinmux_lcd_pins_default {
pinctrl-single,pins = <
AM33XX_IOPAD(0x820, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
AM33XX_IOPAD(0x824, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
AM33XX_IOPAD(0x828, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
AM33XX_IOPAD(0x82c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
AM33XX_IOPAD(0x830, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
AM33XX_IOPAD(0x834, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
AM33XX_IOPAD(0x838, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
AM33XX_IOPAD(0x83c, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE1)
AM33XX_IOPAD(0x8a0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8a4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8a8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8ac, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8b0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8b4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8b8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8bc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8c0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8c4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8c8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8cc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8d0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8d4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8d8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8dc, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8e0, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8e4, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8e8, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
AM33XX_IOPAD(0x8ec, PIN_OUTPUT | SLEWCTRL_SLOW | MUX_MODE0)
>;
};
lcd_pins_sleep: pinmux_lcd_pins_sleep {
pinctrl-single,pins = <
AM33XX_IOPAD(0x8a0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8a4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8a8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8ac, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8b0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8b4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8b8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8bc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8c0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8c4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8c8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8cc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8d0, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8d4, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8d8, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8dc, PULL_DISABLE | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | SLEWCTRL_SLOW | MUX_MODE7)
>;
};
leds_pins: pinmux_leds_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x868, PIN_OUTPUT | MUX_MODE7)
AM33XX_IOPAD(0x86c, PIN_OUTPUT | MUX_MODE7)
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7)
>;
};
spi0_pins: pinmux_spi0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x950, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
AM33XX_IOPAD(0x954, PIN_OUTPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x95c, PIN_OUTPUT_PULLUP | MUX_MODE0)
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
>;
};
nandflash_pins: pinmux_nandflash_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x800, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x804, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x808, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x80c, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x810, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x814, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x818, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x81c, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE0)
AM33XX_IOPAD(0x874, PIN_OUTPUT | MUX_MODE0)
AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)
AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)
AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)
AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)
AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)
>;
};
};

7
arch/arm/mach-omap2/am33xx/Kconfig
View File

@ -87,6 +87,13 @@ config TARGET_AM335X_SHC
imply CMD_DM
imply CMD_SPL
config TARGET_AM335X_GUARDIAN
bool "Support am335x based guardian board from bosch"
select DM
select DM_SERIAL
select DM_GPIO
select DM_USB
config TARGET_AM335X_SL50
bool "Support am335x_sl50"
select BOARD_LATE_INIT

15
board/bosch/guardian/Kconfig Normal file
View File

@ -0,0 +1,15 @@
if TARGET_AM335X_GUARDIAN
config SYS_BOARD
default "guardian"
config SYS_VENDOR
default "bosch"
config SYS_SOC
default "am33xx"
config SYS_CONFIG_NAME
default "am335x_guardian"
endif

6
board/bosch/guardian/MAINTAINERS Normal file
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@ -0,0 +1,6 @@
Guardian BOARD
M: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
S: Maintained
F: board/bosch/guardian/
F: include/configs/am335x_guardian.h
F: configs/am335x_guardian_defconfig

12
board/bosch/guardian/Makefile Normal file
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@ -0,0 +1,12 @@
# SPDX-License-Identifier: GPL-2.0+
#
# Makefile
#
# Copyright (C) 2018 Robert Bosch Power Tools GmbH
#
ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),)
obj-y := mux.o
endif
obj-y += board.o

186
board/bosch/guardian/board.c Normal file
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@ -0,0 +1,186 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* board.c
*
* Board functions for Bosch Guardian
*
* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
* Copyright (C) 2018 Robert Bosch Power Tools GmbH
*/
#include <common.h>
#include <cpsw.h>
#include <dm.h>
#include <environment.h>
#include <environment.h>
#include <errno.h>
#include <i2c.h>
#include <miiphy.h>
#include <panel.h>
#include <power/tps65217.h>
#include <power/tps65910.h>
#include <spl.h>
#include <watchdog.h>
#include <asm/arch/clock.h>
#include <asm/arch/cpu.h>
#include <asm/arch/ddr_defs.h>
#include <asm/arch/gpio.h>
#include <asm/arch/hardware.h>
#include <asm/arch/mem.h>
#include <asm/arch/mmc_host_def.h>
#include <asm/arch/omap.h>
#include <asm/arch/sys_proto.h>
#include <asm/emif.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include "board.h"
DECLARE_GLOBAL_DATA_PTR;
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
static const struct ddr_data ddr3_data = {
.datardsratio0 = MT41K128M16JT125K_RD_DQS,
.datawdsratio0 = MT41K128M16JT125K_WR_DQS,
.datafwsratio0 = MT41K128M16JT125K_PHY_FIFO_WE,
.datawrsratio0 = MT41K128M16JT125K_PHY_WR_DATA,
};
static const struct cmd_control ddr3_cmd_ctrl_data = {
.cmd0csratio = MT41K128M16JT125K_RATIO,
.cmd0iclkout = MT41K128M16JT125K_INVERT_CLKOUT,
.cmd1csratio = MT41K128M16JT125K_RATIO,
.cmd1iclkout = MT41K128M16JT125K_INVERT_CLKOUT,
.cmd2csratio = MT41K128M16JT125K_RATIO,
.cmd2iclkout = MT41K128M16JT125K_INVERT_CLKOUT,
};
static struct emif_regs ddr3_emif_reg_data = {
.sdram_config = MT41K128M16JT125K_EMIF_SDCFG,
.ref_ctrl = MT41K128M16JT125K_EMIF_SDREF,
.sdram_tim1 = MT41K128M16JT125K_EMIF_TIM1,
.sdram_tim2 = MT41K128M16JT125K_EMIF_TIM2,
.sdram_tim3 = MT41K128M16JT125K_EMIF_TIM3,
.zq_config = MT41K128M16JT125K_ZQ_CFG,
.emif_ddr_phy_ctlr_1 = MT41K128M16JT125K_EMIF_READ_LATENCY,
};
#define OSC (V_OSCK / 1000000)
const struct dpll_params dpll_ddr = {
400, OSC - 1, 1, -1, -1, -1, -1};
void am33xx_spl_board_init(void)
{
int mpu_vdd;
int usb_cur_lim;
/* Get the frequency */
dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev);
if (i2c_probe(TPS65217_CHIP_PM))
return;
/*
* Increase USB current limit to 1300mA or 1800mA and set
* the MPU voltage controller as needed.
*/
if (dpll_mpu_opp100.m == MPUPLL_M_1000) {
usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1800MA;
mpu_vdd = TPS65217_DCDC_VOLT_SEL_1325MV;
} else {
usb_cur_lim = TPS65217_USB_INPUT_CUR_LIMIT_1300MA;
mpu_vdd = TPS65217_DCDC_VOLT_SEL_1275MV;
}
if (tps65217_reg_write(TPS65217_PROT_LEVEL_NONE,
TPS65217_POWER_PATH,
usb_cur_lim,
TPS65217_USB_INPUT_CUR_LIMIT_MASK))
puts("tps65217_reg_write failure\n");
/* Set DCDC3 (CORE) voltage to 1.125V */
if (tps65217_voltage_update(TPS65217_DEFDCDC3,
TPS65217_DCDC_VOLT_SEL_1125MV)) {
puts("tps65217_voltage_update failure\n");
return;
}
/* Set CORE Frequencies to OPP100 */
do_setup_dpll(&dpll_core_regs, &dpll_core_opp100);
/* Set DCDC2 (MPU) voltage */
if (tps65217_voltage_update(TPS65217_DEFDCDC2, mpu_vdd)) {
puts("tps65217_voltage_update failure\n");
return;
}
/*
* Set LDO3 to 1.8V and LDO4 to 3.3V
*/
if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
TPS65217_DEFLS1,
TPS65217_LDO_VOLTAGE_OUT_1_8,
TPS65217_LDO_MASK))
puts("tps65217_reg_write failure\n");
if (tps65217_reg_write(TPS65217_PROT_LEVEL_2,
TPS65217_DEFLS2,
TPS65217_LDO_VOLTAGE_OUT_3_3,
TPS65217_LDO_MASK))
puts("tps65217_reg_write failure\n");
/* Set MPU Frequency to what we detected now that voltages are set */
do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100);
}
const struct dpll_params *get_dpll_ddr_params(void)
{
enable_i2c0_pin_mux();
i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
return &dpll_ddr;
}
void set_uart_mux_conf(void)
{
enable_uart0_pin_mux();
}
void set_mux_conf_regs(void)
{
enable_board_pin_mux();
}
const struct ctrl_ioregs ioregs = {
.cm0ioctl = MT41K128M16JT125K_IOCTRL_VALUE,
.cm1ioctl = MT41K128M16JT125K_IOCTRL_VALUE,
.cm2ioctl = MT41K128M16JT125K_IOCTRL_VALUE,
.dt0ioctl = MT41K128M16JT125K_IOCTRL_VALUE,
.dt1ioctl = MT41K128M16JT125K_IOCTRL_VALUE,
};
void sdram_init(void)
{
config_ddr(400, &ioregs,
&ddr3_data,
&ddr3_cmd_ctrl_data,
&ddr3_emif_reg_data, 0);
}
#endif
int board_init(void)
{
#if defined(CONFIG_HW_WATCHDOG)
hw_watchdog_init();
#endif
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
#ifdef CONFIG_NAND
gpmc_init();
#endif
return 0;
}

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* board.h
*
* Board header for Bosch Guardian
*
* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
* Copyright (C) 2018 Robert Bosch Power Tools GmbH
*/
#ifndef _BOARD_H_
#define _BOARD_H_
void enable_uart0_pin_mux(void);
void enable_i2c0_pin_mux(void);
void enable_board_pin_mux(void);
#endif

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// SPDX-License-Identifier: GPL-2.0+
/*
* mux.c
*
* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
* Copyright (C) 2018 Robert Bosch Power Tools GmbH
*/
#include <common.h>
#include <i2c.h>
#include <asm/arch/hardware.h>
#include <asm/arch/mux.h>
#include <asm/arch/sys_proto.h>
#include <asm/io.h>
#include "board.h"
static struct module_pin_mux uart0_pin_mux[] = {
{OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)},
{OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},
{-1},
};
static struct module_pin_mux i2c0_pin_mux[] = {
{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
{-1},
};
static struct module_pin_mux adc_voltages_en[] = {
{OFFSET(mcasp0_ahclkx), (MODE(7) | PULLUP_EN)},
{-1},
};
static struct module_pin_mux asp_power_en[] = {
{OFFSET(mcasp0_aclkx), (MODE(7) | PULLUP_EN)},
{-1},
};
static struct module_pin_mux switch_off_3v6_pin_mux[] = {
{OFFSET(mii1_txd0), (MODE(7) | PULLUP_EN)},
/*
* The uart1 lines are made floating inputs, based on the Guardian
* A2 Sample Power Supply Schematics
*/
{OFFSET(uart1_rxd), (MODE(7) | PULLUDDIS)},
{OFFSET(uart1_txd), (MODE(7) | PULLUDDIS)},
{-1},
};
#ifdef CONFIG_NAND
static struct module_pin_mux nand_pin_mux[] = {
{OFFSET(gpmc_ad0), (MODE(0) | PULLUDDIS | RXACTIVE)},
{OFFSET(gpmc_ad1), (MODE(0) | PULLUDDIS | RXACTIVE)},
{OFFSET(gpmc_ad2), (MODE(0) | PULLUDDIS | RXACTIVE)},
{OFFSET(gpmc_ad3), (MODE(0) | PULLUDDIS | RXACTIVE)},
{OFFSET(gpmc_ad4), (MODE(0) | PULLUDDIS | RXACTIVE)},
{OFFSET(gpmc_ad5), (MODE(0) | PULLUDDIS | RXACTIVE)},
{OFFSET(gpmc_ad6), (MODE(0) | PULLUDDIS | RXACTIVE)},
{OFFSET(gpmc_ad7), (MODE(0) | PULLUDDIS | RXACTIVE)},
#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
{OFFSET(gpmc_ad8), (MODE(0) | PULLUDDIS | RXACTIVE)},
{OFFSET(gpmc_ad9), (MODE(0) | PULLUDDIS | RXACTIVE)},
{OFFSET(gpmc_ad10), (MODE(0) | PULLUDDIS | RXACTIVE)},
{OFFSET(gpmc_ad11), (MODE(0) | PULLUDDIS | RXACTIVE)},
{OFFSET(gpmc_ad12), (MODE(0) | PULLUDDIS | RXACTIVE)},
{OFFSET(gpmc_ad13), (MODE(0) | PULLUDDIS | RXACTIVE)},
{OFFSET(gpmc_ad14), (MODE(0) | PULLUDDIS | RXACTIVE)},
{OFFSET(gpmc_ad15), (MODE(0) | PULLUDDIS | RXACTIVE)},
#endif
{OFFSET(gpmc_wait0), (MODE(0) | PULLUP_EN | RXACTIVE)},
{OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN)},
{OFFSET(gpmc_csn0), (MODE(0) | PULLUP_EN)},
{OFFSET(gpmc_wen), (MODE(0) | PULLDOWN_EN)},
{OFFSET(gpmc_oen_ren), (MODE(0) | PULLDOWN_EN)},
{OFFSET(gpmc_advn_ale), (MODE(0) | PULLDOWN_EN)},
{OFFSET(gpmc_be0n_cle), (MODE(0) | PULLDOWN_EN)},
{-1},
};
#endif
void enable_uart0_pin_mux(void)
{
configure_module_pin_mux(uart0_pin_mux);
}
void enable_i2c0_pin_mux(void)
{
configure_module_pin_mux(i2c0_pin_mux);
}
void enable_board_pin_mux(void)
{
#ifdef CONFIG_NAND
configure_module_pin_mux(nand_pin_mux);
#endif
configure_module_pin_mux(adc_voltages_en);
configure_module_pin_mux(asp_power_en);
configure_module_pin_mux(switch_off_3v6_pin_mux);
}

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CONFIG_ARM=y
CONFIG_ARCH_OMAP2PLUS=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_AM33XX=y
CONFIG_TARGET_AM335X_GUARDIAN=y
CONFIG_SPL_MMC_SUPPORT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_SPL=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTSTAGE_STASH_ADDR=0x0
CONFIG_CONSOLE_MUX=y
CONFIG_SYS_CONSOLE_INFO_QUIET=y
CONFIG_VERSION_VARIABLE=y
CONFIG_ARCH_MISC_INIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SPL_ENV_SUPPORT=y
CONFIG_SPL_ETH_SUPPORT=y
CONFIG_SPL_I2C_SUPPORT=y
CONFIG_SPL_MUSB_NEW_SUPPORT=y
CONFIG_SPL_NET_SUPPORT=y
CONFIG_SPL_NET_VCI_STRING="Guardian U-Boot SPL"
CONFIG_SPL_POWER_SUPPORT=y
CONFIG_SPL_USB_GADGET=y
CONFIG_SPL_USB_ETHER=y
CONFIG_SPL_WATCHDOG_SUPPORT=y
CONFIG_SPL_YMODEM_SUPPORT=y
CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
CONFIG_AUTOBOOT_DELAY_STR="d"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x0
CONFIG_CMD_ASKENV=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_MTD=y
CONFIG_CMD_NAND=y
CONFIG_CMD_USB=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:256k(SPL),256k(SPL.backup1),256k(SPL.backup2),256k(SPL.backup3),1m(u-boot),1m(u-boot.backup1),256k(u-boot-env),256k(u-boot-env.backup1),-(UBI)"
CONFIG_CMD_UBI=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="am335x-guardian"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SPL_ENV_IS_NOWHERE=y
CONFIG_SPL_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_ENV=y
CONFIG_MISC=y
CONFIG_DM_MMC=y
CONFIG_MMC_OMAP_HS=y
CONFIG_MTD=y
CONFIG_NAND=y
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x100000
CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x200000
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
CONFIG_PHY=y
CONFIG_NOP_PHY=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_SINGLE=y
CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_SPL_DM_USB_GADGET=y
CONFIG_USB_MUSB_HOST=y
CONFIG_USB_MUSB_GADGET=y
CONFIG_USB_MUSB_TI=y
CONFIG_USB_MUSB_DSPS=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
CONFIG_USB_GADGET_VENDOR_NUM=0x0451
CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
CONFIG_USB_ETHER=y
CONFIG_FAT_WRITE=y

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/* SPDX-License-Identifier: GPL-2.0+ */
/*
* am335x_guardian_.h
*
* Copyright (C) 2018 Robert Bosch Power Tools GmbH
* Copyright (C) 2018 sjoerd Simons <sjoerd.simons@collabora.co.uk>
*
*/
#ifndef __CONFIG_AM335X_GUARDIAN_H
#define __CONFIG_AM335X_GUARDIAN_H
#include <configs/ti_am335x_common.h>
#ifndef CONFIG_SPL_BUILD
#define CONFIG_TIMESTAMP
#endif
/* Clock Defines */
#define V_OSCK 24000000 /* Clock output from T2 */
#define V_SCLK (V_OSCK)
#ifndef CONFIG_SPL_BUILD
#define MEM_LAYOUT_ENV_SETTINGS \
"scriptaddr=0x80000000\0" \
"pxefile_addr_r=0x80100000\0" \
"kernel_addr_r=0x82000000\0" \
"fdt_addr_r=0x88000000\0" \
"ramdisk_addr_r=0x88080000\0" \
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(UBIFS, ubifs, 0) \
func(PXE, pxe, na) \
func(DHCP, dhcp, na)
#define AM335XX_BOARD_FDTFILE "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0"
#include <config_distro_bootcmd.h>
#define CONFIG_EXTRA_ENV_SETTINGS \
AM335XX_BOARD_FDTFILE \
MEM_LAYOUT_ENV_SETTINGS \
BOOTENV \
"bootlimit=3\0" \
"altbootcmd=" \
"setenv boot_config \"extlinux-rollback.conf\"; " \
"run distro_bootcmd\0"
#endif /* CONFIG_SPL_BUILD */
/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
/* PMIC support */
#define CONFIG_POWER_TPS65217
/* Bootcount using the RTC block */
#define CONFIG_SYS_BOOTCOUNT_LE
#ifdef CONFIG_NAND
#define CONFIG_ENV_OFFSET 0x300000
#define CONFIG_ENV_OFFSET_REDUND 0x340000
#define CONFIG_ENV_SIZE 0x040000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_PAGE_SIZE 4096
#define CONFIG_SYS_NAND_OOBSIZE 256
#define CONFIG_SYS_NAND_BLOCK_SIZE (256 * 1024)
#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \
20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \
30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \
40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \
50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \
60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \
70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \
90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \
100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \
110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \
120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \
130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \
140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \
150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \
160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \
170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \
180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \
190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \
200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \
}
#define CONFIG_SYS_NAND_ECCSIZE 512
#define CONFIG_SYS_NAND_ECCBYTES 26
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW
#define MTDIDS_DEFAULT "nand0=nand.0"
#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
#endif /* CONFIG_NAND */
#endif /* ! __CONFIG_AM335X_GUARDIAN_H */