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ARM: dts: uniphier: rename DT nodes to follow json-schema

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Import the nodename changes I made in Linux for avoiding dt-schama
warnings. This follows the $nodename patterns in the dt-schema.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Masahiro Yamada 2020-02-28 21:57:19 +09:00
parent bfa3c97e69
commit 44ebaa8e13
8 changed files with 38 additions and 38 deletions
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6
arch/arm/dts/uniphier-ld11.dtsi
View File

@ -433,7 +433,7 @@
};
};
emmc: sdhc@5a000000 {
emmc: mmc@5a000000 {
compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
reg = <0x5a000000 0x400>;
interrupts = <0 78 4>;
@ -566,7 +566,7 @@
};
};
aidet: aidet@5fc20000 {
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-ld11-aidet";
reg = <0x5fc20000 0x200>;
interrupt-controller;
@ -621,7 +621,7 @@
};
};
nand: nand@68000000 {
nand: nand-controller@68000000 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
reg-names = "nand_data", "denali_reg";

8
arch/arm/dts/uniphier-ld20.dtsi
View File

@ -559,7 +559,7 @@
};
};
emmc: sdhc@5a000000 {
emmc: mmc@5a000000 {
compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
reg = <0x5a000000 0x400>;
interrupts = <0 78 4>;
@ -578,7 +578,7 @@
cdns,phy-dll-delay-sdclk-hsmmc = <21>;
};
sd: sdhc@5a400000 {
sd: mmc@5a400000 {
compatible = "socionext,uniphier-sd-v3.1.1";
status = "disabled";
reg = <0x5a400000 0x800>;
@ -664,7 +664,7 @@
};
};
aidet: aidet@5fc20000 {
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-ld20-aidet";
reg = <0x5fc20000 0x200>;
interrupt-controller;
@ -944,7 +944,7 @@
socionext,syscon = <&soc_glue>;
};
nand: nand@68000000 {
nand: nand-controller@68000000 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
reg-names = "nand_data", "denali_reg";

10
arch/arm/dts/uniphier-ld4.dtsi
View File

@ -51,7 +51,7 @@
ranges;
interrupt-parent = <&intc>;
l2: l2-cache@500c0000 {
l2: cache-controller@500c0000 {
compatible = "socionext,uniphier-system-cache";
reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
<0x506c0000 0x400>;
@ -245,7 +245,7 @@
#dma-cells = <1>;
};
sd: sdhc@5a400000 {
sd: mmc@5a400000 {
compatible = "socionext,uniphier-sd-v2.91";
status = "disabled";
reg = <0x5a400000 0x200>;
@ -265,7 +265,7 @@
sd-uhs-sdr50;
};
emmc: sdhc@5a500000 {
emmc: mmc@5a500000 {
compatible = "socionext,uniphier-sd-v2.91";
status = "disabled";
reg = <0x5a500000 0x200>;
@ -375,7 +375,7 @@
interrupt-controller;
};
aidet: aidet@61830000 {
aidet: interrupt-controller@61830000 {
compatible = "socionext,uniphier-ld4-aidet";
reg = <0x61830000 0x200>;
interrupt-controller;
@ -398,7 +398,7 @@
};
};
nand: nand@68000000 {
nand: nand-controller@68000000 {
compatible = "socionext,uniphier-denali-nand-v5a";
status = "disabled";
reg-names = "nand_data", "denali_reg";

12
arch/arm/dts/uniphier-pro4.dtsi
View File

@ -59,7 +59,7 @@
ranges;
interrupt-parent = <&intc>;
l2: l2-cache@500c0000 {
l2: cache-controller@500c0000 {
compatible = "socionext,uniphier-system-cache";
reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
<0x506c0000 0x400>;
@ -279,7 +279,7 @@
#dma-cells = <1>;
};
sd: sdhc@5a400000 {
sd: mmc@5a400000 {
compatible = "socionext,uniphier-sd-v2.91";
status = "disabled";
reg = <0x5a400000 0x200>;
@ -299,7 +299,7 @@
sd-uhs-sdr50;
};
emmc: sdhc@5a500000 {
emmc: mmc@5a500000 {
compatible = "socionext,uniphier-sd-v2.91";
status = "disabled";
reg = <0x5a500000 0x200>;
@ -317,7 +317,7 @@
non-removable;
};
sd1: sdhc@5a600000 {
sd1: mmc@5a600000 {
compatible = "socionext,uniphier-sd-v2.91";
status = "disabled";
reg = <0x5a600000 0x200>;
@ -426,7 +426,7 @@
};
};
aidet: aidet@5fc20000 {
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-pro4-aidet";
reg = <0x5fc20000 0x200>;
interrupt-controller;
@ -626,7 +626,7 @@
};
};
nand: nand@68000000 {
nand: nand-controller@68000000 {
compatible = "socionext,uniphier-denali-nand-v5a";
status = "disabled";
reg-names = "nand_data", "denali_reg";

12
arch/arm/dts/uniphier-pro5.dtsi
View File

@ -131,7 +131,7 @@
ranges;
interrupt-parent = <&intc>;
l2: l2-cache@500c0000 {
l2: cache-controller@500c0000 {
compatible = "socionext,uniphier-system-cache";
reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
<0x506c0000 0x400>;
@ -144,7 +144,7 @@
next-level-cache = <&l3>;
};
l3: l3-cache@500c8000 {
l3: cache-controller@500c8000 {
compatible = "socionext,uniphier-system-cache";
reg = <0x500c8000 0x2000>, <0x503c8100 0x8>,
<0x506c8000 0x400>;
@ -408,7 +408,7 @@
};
};
aidet: aidet@5fc20000 {
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-pro5-aidet";
reg = <0x5fc20000 0x200>;
interrupt-controller;
@ -489,7 +489,7 @@
};
};
nand: nand@68000000 {
nand: nand-controller@68000000 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
reg-names = "nand_data", "denali_reg";
@ -502,7 +502,7 @@
resets = <&sys_rst 2>;
};
emmc: sdhc@68400000 {
emmc: mmc@68400000 {
compatible = "socionext,uniphier-sd-v3.1";
status = "disabled";
reg = <0x68400000 0x800>;
@ -518,7 +518,7 @@
non-removable;
};
sd: sdhc@68800000 {
sd: mmc@68800000 {
compatible = "socionext,uniphier-sd-v3.1";
status = "disabled";
reg = <0x68800000 0x800>;

10
arch/arm/dts/uniphier-pxs2.dtsi
View File

@ -157,7 +157,7 @@
ranges;
interrupt-parent = <&intc>;
l2: l2-cache@500c0000 {
l2: cache-controller@500c0000 {
compatible = "socionext,uniphier-system-cache";
reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
<0x506c0000 0x400>;
@ -446,7 +446,7 @@
};
};
emmc: sdhc@5a000000 {
emmc: mmc@5a000000 {
compatible = "socionext,uniphier-sd-v3.1.1";
status = "disabled";
reg = <0x5a000000 0x800>;
@ -462,7 +462,7 @@
non-removable;
};
sd: sdhc@5a400000 {
sd: mmc@5a400000 {
compatible = "socionext,uniphier-sd-v3.1.1";
status = "disabled";
reg = <0x5a400000 0x800>;
@ -508,7 +508,7 @@
};
};
aidet: aidet@5fc20000 {
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-pxs2-aidet";
reg = <0x5fc20000 0x200>;
interrupt-controller;
@ -799,7 +799,7 @@
};
};
nand: nand@68000000 {
nand: nand-controller@68000000 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
reg-names = "nand_data", "denali_reg";

8
arch/arm/dts/uniphier-pxs3.dtsi
View File

@ -353,7 +353,7 @@
};
};
emmc: sdhc@5a000000 {
emmc: mmc@5a000000 {
compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
reg = <0x5a000000 0x400>;
interrupts = <0 78 4>;
@ -372,7 +372,7 @@
cdns,phy-dll-delay-sdclk-hsmmc = <21>;
};
sd: sdhc@5a400000 {
sd: mmc@5a400000 {
compatible = "socionext,uniphier-sd-v3.1.1";
status = "disabled";
reg = <0x5a400000 0x800>;
@ -462,7 +462,7 @@
};
};
aidet: aidet@5fc20000 {
aidet: interrupt-controller@5fc20000 {
compatible = "socionext,uniphier-pxs3-aidet";
reg = <0x5fc20000 0x200>;
interrupt-controller;
@ -821,7 +821,7 @@
socionext,syscon = <&soc_glue>;
};
nand: nand@68000000 {
nand: nand-controller@68000000 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
reg-names = "nand_data", "denali_reg";

10
arch/arm/dts/uniphier-sld8.dtsi
View File

@ -51,7 +51,7 @@
ranges;
interrupt-parent = <&intc>;
l2: l2-cache@500c0000 {
l2: cache-controller@500c0000 {
compatible = "socionext,uniphier-system-cache";
reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
<0x506c0000 0x400>;
@ -249,7 +249,7 @@
#dma-cells = <1>;
};
sd: sdhc@5a400000 {
sd: mmc@5a400000 {
compatible = "socionext,uniphier-sd-v2.91";
status = "disabled";
reg = <0x5a400000 0x200>;
@ -269,7 +269,7 @@
sd-uhs-sdr50;
};
emmc: sdhc@5a500000 {
emmc: mmc@5a500000 {
compatible = "socionext,uniphier-sd-v2.91";
status = "disabled";
reg = <0x5a500000 0x200>;
@ -379,7 +379,7 @@
interrupt-controller;
};
aidet: aidet@61830000 {
aidet: interrupt-controller@61830000 {
compatible = "socionext,uniphier-sld8-aidet";
reg = <0x61830000 0x200>;
interrupt-controller;
@ -402,7 +402,7 @@
};
};
nand: nand@68000000 {
nand: nand-controller@68000000 {
compatible = "socionext,uniphier-denali-nand-v5a";
status = "disabled";
reg-names = "nand_data", "denali_reg";