riscv: tools: Prelink u-boot
Add prelink-riscv to arrange .rela.dyn and .rela.got in compile time. So that u-boot can be directly executed without fixup. Signed-off-by: Chih-Mao Chen <cmchen@andestech.com> Signed-off-by: Rick Chen <rick@andestech.com> Signed-off-by: Rick Chen <rickchen36@gmail.com> Signed-off-by: Greentime Hu <green.hu@gmail.com>
This commit is contained in:
Rick Chen
Tom Rini
parent
3dafc016c1
commit
42ac26f2b0
4
Makefile
4
Makefile
@ -1264,6 +1264,10 @@ ifeq ($(CONFIG_KALLSYMS),y)
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$(call cmd,u-boot__) common/system_map.o
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endif
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ifeq ($(CONFIG_RISCV),y)
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@tools/prelink-riscv $@ 0
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endif
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quiet_cmd_sym ?= SYM $@
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cmd_sym ?= $(OBJDUMP) -t $< > $@
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u-boot.sym: u-boot FORCE
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@ -185,6 +185,7 @@ hostprogs-$(CONFIG_KIRKWOOD) += kwboot
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hostprogs-$(CONFIG_ARCH_MVEBU) += kwboot
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hostprogs-y += proftool
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hostprogs-$(CONFIG_STATIC_RELA) += relocate-rela
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hostprogs-$(CONFIG_RISCV) += prelink-riscv
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hostprogs-y += fdtgrep
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fdtgrep-objs += $(LIBFDT_OBJS) fdtgrep.o
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102
tools/prelink-riscv.c
Normal file
102
tools/prelink-riscv.c
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@ -0,0 +1,102 @@
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/*
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* Copyright (C) 2017 Andes Technology
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* Chih-Mao Chen <cmchen@andestech.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* Statically process runtime relocations on RISC-V ELF images
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* so that it can be directly executed when loaded at LMA
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* without fixup. Both RV32 and RV64 are supported.
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*/
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#if __BYTE_ORDER__ != __ORDER_LITTLE_ENDIAN__
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#error "Only little-endian host is supported"
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#endif
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#include <errno.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <elf.h>
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#include <fcntl.h>
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#include <sys/mman.h>
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#include <sys/stat.h>
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#include <sys/types.h>
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#include <unistd.h>
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#ifndef EM_RISCV
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#define EM_RISCV 243
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#endif
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#ifndef R_RISCV_32
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#define R_RISCV_32 1
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#endif
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#ifndef R_RISCV_64
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#define R_RISCV_64 2
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#endif
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#ifndef R_RISCV_RELATIVE
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#define R_RISCV_RELATIVE 3
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#endif
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const char *argv0;
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#define die(fmt, ...) \
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do { \
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fprintf(stderr, "%s: " fmt "\n", argv0, ## __VA_ARGS__); \
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exit(EXIT_FAILURE); \
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} while (0)
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#define PRELINK_INC_BITS 32
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#include "prelink-riscv.inc"
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#undef PRELINK_INC_BITS
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#define PRELINK_INC_BITS 64
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#include "prelink-riscv.inc"
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#undef PRELINK_INC_BITS
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int main(int argc, const char *const *argv)
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{
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argv0 = argv[0];
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if (argc < 2) {
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fprintf(stderr, "Usage: %s <u-boot>\n", argv0);
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exit(EXIT_FAILURE);
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}
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int fd = open(argv[1], O_RDWR, 0);
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if (fd < 0)
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die("Cannot open %s: %s", argv[1], strerror(errno));
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struct stat st;
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if (fstat(fd, &st) < 0)
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die("Cannot stat %s: %s", argv[1], strerror(errno));
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void *data =
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mmap(0, st.st_size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
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if (data == MAP_FAILED)
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die("Cannot mmap %s: %s", argv[1], strerror(errno));
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close(fd);
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unsigned char *e_ident = (unsigned char *)data;
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if (memcmp(e_ident, ELFMAG, SELFMAG) != 0)
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die("Invalid ELF file %s", argv[1]);
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bool is64 = e_ident[EI_CLASS] == ELFCLASS64;
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if (is64)
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prelink64(data);
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else
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prelink32(data);
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return 0;
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}
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112
tools/prelink-riscv.inc
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112
tools/prelink-riscv.inc
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@ -0,0 +1,112 @@
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/*
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* Copyright (C) 2017 Andes Technology
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* Chih-Mao Chen <cmchen@andestech.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* Statically process runtime relocations on RISC-V ELF images
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* so that it can be directly executed when loaded at LMA
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* without fixup. Both RV32 and RV64 are supported.
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*/
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#define CONCAT_IMPL(x, y) x##y
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#define CONCAT(x, y) CONCAT_IMPL(x, y)
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#define CONCAT3(x, y, z) CONCAT(CONCAT(x, y), z)
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#define prelink_nn CONCAT(prelink, PRELINK_INC_BITS)
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#define uintnn_t CONCAT3(uint, PRELINK_INC_BITS, _t)
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#define get_offset_nn CONCAT(get_offset_, PRELINK_INC_BITS)
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#define Elf_Ehdr CONCAT3(Elf, PRELINK_INC_BITS, _Ehdr)
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#define Elf_Phdr CONCAT3(Elf, PRELINK_INC_BITS, _Phdr)
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#define Elf_Rela CONCAT3(Elf, PRELINK_INC_BITS, _Rela)
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#define Elf_Sym CONCAT3(Elf, PRELINK_INC_BITS, _Sym)
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#define Elf_Dyn CONCAT3(Elf, PRELINK_INC_BITS, _Dyn)
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#define Elf_Addr CONCAT3(Elf, PRELINK_INC_BITS, _Addr)
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#define ELF_R_TYPE CONCAT3(ELF, PRELINK_INC_BITS, _R_TYPE)
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#define ELF_R_SYM CONCAT3(ELF, PRELINK_INC_BITS, _R_SYM)
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static void* get_offset_nn (void* data, Elf_Phdr* phdrs, size_t phnum, Elf_Addr addr)
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{
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Elf_Phdr *p;
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for (p = phdrs; p < phdrs + phnum; ++p)
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if (p->p_vaddr <= addr && p->p_vaddr + p->p_memsz > addr)
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return data + p->p_offset + (addr - p->p_vaddr);
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return NULL;
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}
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static void prelink_nn(void *data)
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{
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Elf_Ehdr *ehdr = data;
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Elf_Phdr *p;
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Elf_Dyn *dyn;
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Elf_Rela *r;
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if (ehdr->e_machine != EM_RISCV)
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die("Machine type is not RISC-V");
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Elf_Phdr *phdrs = data + ehdr->e_phoff;
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Elf_Dyn *dyns = NULL;
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for (p = phdrs; p < phdrs + ehdr->e_phnum; ++p) {
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if (p->p_type == PT_DYNAMIC) {
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dyns = data + p->p_offset;
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break;
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}
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}
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if (dyns == NULL)
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die("No dynamic section found");
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Elf_Rela *rela_dyn = NULL;
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size_t rela_count = 0;
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Elf_Sym *dynsym = NULL;
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for (dyn = dyns;; ++dyn) {
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if (dyn->d_tag == DT_NULL)
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break;
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else if (dyn->d_tag == DT_RELA)
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rela_dyn = get_offset_nn(data, phdrs, ehdr->e_phnum, + dyn->d_un.d_ptr);
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else if (dyn->d_tag == DT_RELASZ)
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rela_count = dyn->d_un.d_val / sizeof(Elf_Rela);
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else if (dyn->d_tag == DT_SYMTAB)
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dynsym = get_offset_nn(data, phdrs, ehdr->e_phnum, + dyn->d_un.d_ptr);
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}
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if (rela_dyn == NULL)
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die("No .rela.dyn found");
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if (dynsym == NULL)
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die("No .dynsym found");
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for (r = rela_dyn; r < rela_dyn + rela_count; ++r) {
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void* buf = get_offset_nn(data, phdrs, ehdr->e_phnum, r->r_offset);
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if (buf == NULL)
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continue;
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if (ELF_R_TYPE(r->r_info) == R_RISCV_RELATIVE)
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*((uintnn_t*) buf) = r->r_addend;
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else if (ELF_R_TYPE(r->r_info) == R_RISCV_32)
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*((uint32_t*) buf) = dynsym[ELF_R_SYM(r->r_info)].st_value;
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else if (ELF_R_TYPE(r->r_info) == R_RISCV_64)
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*((uint64_t*) buf) = dynsym[ELF_R_SYM(r->r_info)].st_value;
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}
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}
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#undef prelink_nn
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#undef uintnn_t
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#undef get_offset_nn
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#undef Elf_Ehdr
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#undef Elf_Phdr
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#undef Elf_Rela
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#undef Elf_Sym
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#undef Elf_Dyn
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#undef Elf_Addr
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#undef ELF_R_TYPE
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#undef ELF_R_SYM
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#undef CONCAT_IMPL
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#undef CONCAT
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#undef CONCAT3
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