Convert CONFIG_CMD_SPL_WRITE_SIZE to Kconfig
This converts the following to Kconfig: CONFIG_CMD_SPL_WRITE_SIZE Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
This commit is contained in:
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203dc1b3a8
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3a91a25376
@ -295,6 +295,15 @@ config CMD_SPL_NAND_OFS
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for full information about how to use this option (and also see
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board/gateworks/gw_ventana/README for an example).
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config CMD_SPL_WRITE_SIZE
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hex "Size of argument area"
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depends on CMD_SPL
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default 0x2000
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help
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This provides the size of the command-line argument area in NAND
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flash used by Falcon-mode boot. See the documentation until CMD_SPL
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for detail.
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endmenu
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menu "Environment commands"
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@ -17,6 +17,7 @@ CONFIG_HUSH_PARSER=y
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_SPL=y
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CONFIG_CMD_SPL_NAND_OFS=0x00100000
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CONFIG_CMD_SPL_WRITE_SIZE=0x40000
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_NAND=y
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# CONFIG_CMD_SETEXPR is not set
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@ -17,6 +17,7 @@ CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_SPL=y
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CONFIG_CMD_SPL_NAND_OFS=0x00100000
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CONFIG_CMD_SPL_WRITE_SIZE=0x40000
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CONFIG_CMD_ASKENV=y
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CONFIG_CMD_EEPROM=y
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# CONFIG_CMD_FLASH is not set
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@ -21,6 +21,7 @@ CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_SPL=y
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CONFIG_CMD_SPL_NAND_OFS=0x00100000
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CONFIG_CMD_SPL_WRITE_SIZE=0x40000
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CONFIG_CMD_ASKENV=y
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CONFIG_CMD_EEPROM=y
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# CONFIG_CMD_FLASH is not set
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@ -12,6 +12,7 @@ CONFIG_HUSH_PARSER=y
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_SPL=y
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CONFIG_CMD_SPL_NAND_OFS=0x680000
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CONFIG_CMD_SPL_WRITE_SIZE=0x400
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_NAND=y
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@ -33,6 +33,7 @@ CONFIG_SYS_PROMPT="Ventana > "
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_SPL_NAND_OFS=0x1100000
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CONFIG_CMD_SPL_WRITE_SIZE=0x20000
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_I2C=y
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@ -33,6 +33,7 @@ CONFIG_SYS_PROMPT="Ventana > "
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_SPL_NAND_OFS=0x1100000
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CONFIG_CMD_SPL_WRITE_SIZE=0x20000
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_I2C=y
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@ -34,6 +34,7 @@ CONFIG_SYS_PROMPT="Ventana > "
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_SPL_NAND_OFS=0x1100000
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CONFIG_CMD_SPL_WRITE_SIZE=0x20000
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_NAND=y
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@ -19,6 +19,7 @@ CONFIG_SYS_PROMPT="U-Boot > "
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_SPL=y
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CONFIG_CMD_SPL_NAND_OFS=0x00180000
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CONFIG_CMD_SPL_WRITE_SIZE=0x400
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CONFIG_CMD_ASKENV=y
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CONFIG_CRC32_VERIFY=y
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# CONFIG_CMD_FLASH is not set
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@ -23,6 +23,7 @@ CONFIG_HUSH_PARSER=y
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CONFIG_CMD_BOOTZ=y
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_SPL=y
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CONFIG_CMD_SPL_WRITE_SIZE=0x20000
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_PART=y
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@ -13,6 +13,7 @@ CONFIG_SYS_PROMPT="twister => "
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_SPL=y
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CONFIG_CMD_SPL_NAND_OFS=0x00800000
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CONFIG_CMD_SPL_WRITE_SIZE=0x400
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CONFIG_CMD_EEPROM=y
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# CONFIG_CMD_FLASH is not set
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CONFIG_CMD_MMC=y
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@ -239,7 +239,6 @@
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#endif
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif
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#endif /* !CONFIG_NAND */
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@ -308,7 +308,6 @@
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/* NAND: SPL falcon mode configs */
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */
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#define CONFIG_CMD_SPL_WRITE_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
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#endif
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#define NANDARGS \
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"mtdids=" MTDIDS_DEFAULT "\0" \
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@ -46,7 +46,6 @@
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#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00080000
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif
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#define NANDARGS \
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"mtdids=" MTDIDS_DEFAULT "\0" \
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@ -396,7 +396,6 @@ DEFAULT_LINUX_BOOT_ENV \
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#endif
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif
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#endif /* !CONFIG_NAND */
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@ -67,7 +67,6 @@
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/* NAND */
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#ifdef CONFIG_NAND
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x140000
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif /* CONFIG_NAND */
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#endif /* CONFIG_SPL_OS_BOOT */
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@ -138,7 +138,6 @@
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif
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/* GPIO pin + bank to pin ID mapping */
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@ -209,7 +209,6 @@
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#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
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/* SPL OS boot options */
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
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#undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
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@ -210,7 +210,6 @@
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/* NAND: SPL falcon mode configs */
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif
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#endif /* !CONFIG_NAND */
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@ -13,7 +13,6 @@
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/* Falcon Mode */
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#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
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#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
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/* Falcon Mode - NAND support: args@17MB kernel@18MB */
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M)
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@ -276,7 +276,6 @@
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/* add FALCON boot mode */
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000
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#define CONFIG_SYS_SPL_ARGS_ADDR LINUX_BOOT_PARAM_ADDR
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x400
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/* GPIO support */
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#define CONFIG_DA8XX_GPIO
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@ -35,7 +35,6 @@
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#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
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#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
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#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
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#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
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/* Falcon Mode - MMC support: args@1MB kernel@2MB */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
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#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
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#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
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#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
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#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
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/* Falcon Mode - MMC support: args@1MB kernel@2MB */
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#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
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@ -277,7 +277,6 @@
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/* NAND: SPL falcon mode configs */
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif
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#endif /* __CONFIG_H */
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/* NAND: SPL falcon mode configs */
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif
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/* env defaults */
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/* NAND: SPL falcon mode configs */
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif
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#endif /* __CONFIG_H */
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/* NAND: SPL falcon mode configs */
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif
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#endif /* __CONFIG_H */
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/* NAND: SPL falcon mode configs */
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif
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#endif
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/* NAND: SPL falcon mode configs */
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#ifdef CONFIG_SPL_OS_BOOT
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
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#endif
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/*
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"bootcmd=run nandboot\0"
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/* SPL OS boot options */
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#define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */
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#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000
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#define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100)
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CONFIG_CMDLINE_EDITING
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CONFIG_CMDLINE_PS_SUPPORT
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CONFIG_CMDLINE_TAG
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CONFIG_CMD_SPL_WRITE_SIZE
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CONFIG_CMD_STRINGS
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CONFIG_CMD_SX151X
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CONFIG_CMD_TCA642X
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