mx6qsabrelite: add i2c support
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
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@ -55,6 +55,11 @@ DECLARE_GLOBAL_DATA_PTR;
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
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#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
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PAD_CTL_ODE | PAD_CTL_SRE_FAST)
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE);
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@ -72,6 +77,11 @@ iomux_v3_cfg_t uart2_pads[] = {
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MX6Q_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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iomux_v3_cfg_t i2c3_pads[] = {
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MX6Q_PAD_GPIO_5__I2C3_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL),
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MX6Q_PAD_GPIO_16__I2C3_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL),
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};
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iomux_v3_cfg_t usdhc3_pads[] = {
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MX6Q_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6Q_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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@ -336,6 +346,7 @@ int board_init(void)
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#ifdef CONFIG_MXC_SPI
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setup_spi();
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#endif
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imx_iomux_v3_setup_multiple_pads(i2c3_pads, ARRAY_SIZE(i2c3_pads));
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#ifdef CONFIG_CMD_SATA
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setup_sata();
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@ -58,6 +58,14 @@
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#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
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#endif
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/* I2C Configs */
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#define CONFIG_CMD_I2C
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#define CONFIG_HARD_I2C
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#define CONFIG_I2C_MXC
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#define CONFIG_SYS_I2C_BASE I2C3_BASE_ADDR
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_I2C_SLAVE 0xfe
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/* MMC Configs */
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#define CONFIG_FSL_ESDHC
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#define CONFIG_FSL_USDHC
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