ARM: dts: at91: sama5: Align with Linux Devicetree
This patch makes sure that the Devicetree for the sama5 boards are aligned with the Devicetree from Linux. This implies removing the GPIO compatible and replacing it with the PINCTRL one, as well as unifying the SDMMC pinctrl related subnodes under one single subnode. Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
This commit is contained in:
committed by
Eugen Hristev
parent
56ce54a97c
commit
2df729e96d
@@ -30,7 +30,7 @@
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sdmmc1: sdio-host@b0000000 {
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bus-width = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>;
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pinctrl-0 = <&pinctrl_sdmmc1_default>;
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status = "okay";
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u-boot,dm-pre-reloc;
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};
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@@ -73,10 +73,9 @@
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u-boot,dm-pre-reloc;
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};
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pioA: gpio@fc038000 {
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pinctrl {
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pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default {
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pioA: pinctrl@fc038000 {
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pinctrl_sdmmc1_default: sdmmc1_default {
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cmd_data {
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pinmux = <PIN_PA28__SDMMC1_CMD>,
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<PIN_PA18__SDMMC1_DAT0>,
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<PIN_PA19__SDMMC1_DAT1>,
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@@ -86,41 +85,41 @@
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u-boot,dm-pre-reloc;
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};
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pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default {
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ck_cd {
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pinmux = <PIN_PA22__SDMMC1_CK>,
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<PIN_PA30__SDMMC1_CD>;
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bias-disable;
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u-boot,dm-pre-reloc;
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};
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};
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pinctrl_uart1_default: uart1_default {
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pinmux = <PIN_PD2__URXD1>,
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<PIN_PD3__UTXD1>;
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bias-disable;
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u-boot,dm-pre-reloc;
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};
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pinctrl_uart1_default: uart1_default {
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pinmux = <PIN_PD2__URXD1>,
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<PIN_PD3__UTXD1>;
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bias-disable;
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u-boot,dm-pre-reloc;
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};
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pinctrl_i2c0_default: i2c0_default {
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pinmux = <PIN_PD21__TWD0>,
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<PIN_PD22__TWCK0>;
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bias-disable;
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};
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pinctrl_i2c0_default: i2c0_default {
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pinmux = <PIN_PD21__TWD0>,
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<PIN_PD22__TWCK0>;
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bias-disable;
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};
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pinctrl_i2c1_default: i2c1_default {
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pinmux = <PIN_PD4__TWD1>,
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<PIN_PD5__TWCK1>;
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bias-disable;
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};
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pinctrl_i2c1_default: i2c1_default {
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pinmux = <PIN_PD4__TWD1>,
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<PIN_PD5__TWCK1>;
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bias-disable;
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};
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pinctrl_usb_default: usb_default {
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pinmux = <PIN_PB10__GPIO>;
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bias-disable;
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};
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pinctrl_usb_default: usb_default {
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pinmux = <PIN_PB10__GPIO>;
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bias-disable;
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};
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pinctrl_usba_vbus: usba_vbus {
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pinmux = <PIN_PA31__GPIO>;
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bias-disable;
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};
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pinctrl_usba_vbus: usba_vbus {
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pinmux = <PIN_PA31__GPIO>;
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bias-disable;
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};
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};
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};
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@@ -83,7 +83,7 @@
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sdmmc0: sdio-host@a0000000 {
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bus-width = <8>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
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pinctrl-0 = <&pinctrl_sdmmc0_default>;
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status = "okay";
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u-boot,dm-pre-reloc;
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};
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@@ -91,7 +91,7 @@
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sdmmc1: sdio-host@b0000000 {
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bus-width = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>;
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pinctrl-0 = <&pinctrl_sdmmc1_default>;
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status = "okay"; /* conflict with qspi0 */
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u-boot,dm-pre-reloc;
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};
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@@ -129,7 +129,7 @@
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u-boot,dm-pre-reloc;
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};
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pioA: gpio@fc038000 {
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pioA: pinctrl@fc038000 {
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pinctrl {
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pinctrl_lcd_base: pinctrl_lcd_base {
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pinmux = <PIN_PC5__LCDVSYNC>,
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@@ -166,43 +166,47 @@
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bias-disable;
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};
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pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
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pinmux = <PIN_PA1__SDMMC0_CMD>,
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<PIN_PA2__SDMMC0_DAT0>,
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<PIN_PA3__SDMMC0_DAT1>,
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<PIN_PA4__SDMMC0_DAT2>,
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<PIN_PA5__SDMMC0_DAT3>,
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<PIN_PA6__SDMMC0_DAT4>,
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<PIN_PA7__SDMMC0_DAT5>,
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<PIN_PA8__SDMMC0_DAT6>,
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<PIN_PA9__SDMMC0_DAT7>;
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bias-pull-up;
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u-boot,dm-pre-reloc;
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pinctrl_sdmmc0_default: sdmmc0_default {
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cmd_dat {
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pinmux = <PIN_PA1__SDMMC0_CMD>,
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<PIN_PA2__SDMMC0_DAT0>,
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<PIN_PA3__SDMMC0_DAT1>,
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<PIN_PA4__SDMMC0_DAT2>,
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<PIN_PA5__SDMMC0_DAT3>,
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<PIN_PA6__SDMMC0_DAT4>,
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<PIN_PA7__SDMMC0_DAT5>,
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<PIN_PA8__SDMMC0_DAT6>,
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<PIN_PA9__SDMMC0_DAT7>;
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bias-pull-up;
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u-boot,dm-pre-reloc;
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};
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ck_cd {
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pinmux = <PIN_PA0__SDMMC0_CK>,
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<PIN_PA10__SDMMC0_RSTN>,
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<PIN_PA13__SDMMC0_CD>;
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bias-disable;
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u-boot,dm-pre-reloc;
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};
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};
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pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
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pinmux = <PIN_PA0__SDMMC0_CK>,
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<PIN_PA10__SDMMC0_RSTN>,
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<PIN_PA13__SDMMC0_CD>;
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bias-disable;
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u-boot,dm-pre-reloc;
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};
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pinctrl_sdmmc1_default: sdmmc1_default {
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cmd_dat {
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pinmux = <PIN_PA28__SDMMC1_CMD>,
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<PIN_PA18__SDMMC1_DAT0>,
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<PIN_PA19__SDMMC1_DAT1>,
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<PIN_PA20__SDMMC1_DAT2>,
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<PIN_PA21__SDMMC1_DAT3>;
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bias-pull-up;
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u-boot,dm-pre-reloc;
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};
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pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default {
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pinmux = <PIN_PA28__SDMMC1_CMD>,
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<PIN_PA18__SDMMC1_DAT0>,
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<PIN_PA19__SDMMC1_DAT1>,
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<PIN_PA20__SDMMC1_DAT2>,
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<PIN_PA21__SDMMC1_DAT3>;
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bias-pull-up;
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u-boot,dm-pre-reloc;
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};
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pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default {
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pinmux = <PIN_PA22__SDMMC1_CK>,
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<PIN_PA30__SDMMC1_CD>;
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bias-disable;
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u-boot,dm-pre-reloc;
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ck_cd {
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pinmux = <PIN_PA22__SDMMC1_CK>,
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<PIN_PA30__SDMMC1_CD>;
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bias-disable;
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u-boot,dm-pre-reloc;
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};
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};
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pinctrl_uart1_default: uart1_default {
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@@ -37,11 +37,7 @@
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u-boot,dm-pre-reloc;
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};
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&pinctrl_sdmmc0_cmd_dat_default {
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u-boot,dm-pre-reloc;
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};
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&pinctrl_sdmmc0_ck_cd_default {
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&pinctrl_sdmmc0_default {
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u-boot,dm-pre-reloc;
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};
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@@ -34,7 +34,7 @@
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sdmmc0: sdio-host@a0000000 {
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bus-width = <4>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
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pinctrl-0 = <&pinctrl_sdmmc0_default>;
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status = "okay";
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};
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@@ -78,44 +78,44 @@
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status = "okay";
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};
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pioA: gpio@fc038000 {
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pinctrl {
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pinctrl_lcd_base: pinctrl_lcd_base {
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pinmux = <PIN_PC30__LCDVSYNC>,
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<PIN_PC31__LCDHSYNC>,
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<PIN_PD1__LCDDEN>,
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<PIN_PD0__LCDPCK>;
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bias-disable;
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};
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pioA: pinctrl@fc038000 {
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pinctrl_lcd_base: pinctrl_lcd_base {
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pinmux = <PIN_PC30__LCDVSYNC>,
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<PIN_PC31__LCDHSYNC>,
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<PIN_PD1__LCDDEN>,
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<PIN_PD0__LCDPCK>;
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bias-disable;
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};
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pinctrl_lcd_pwm: pinctrl_lcd_pwm {
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pinmux = <PIN_PC28__LCDPWM>;
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bias-disable;
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};
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pinctrl_lcd_pwm: pinctrl_lcd_pwm {
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pinmux = <PIN_PC28__LCDPWM>;
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bias-disable;
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};
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pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 {
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pinmux = <PIN_PC10__LCDDAT2>,
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<PIN_PC11__LCDDAT3>,
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<PIN_PC12__LCDDAT4>,
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<PIN_PC13__LCDDAT5>,
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<PIN_PC14__LCDDAT6>,
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<PIN_PC15__LCDDAT7>,
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<PIN_PC16__LCDDAT10>,
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<PIN_PC17__LCDDAT11>,
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<PIN_PC18__LCDDAT12>,
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<PIN_PC19__LCDDAT13>,
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<PIN_PC20__LCDDAT14>,
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<PIN_PC21__LCDDAT15>,
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<PIN_PC22__LCDDAT18>,
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<PIN_PC23__LCDDAT19>,
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<PIN_PC24__LCDDAT20>,
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<PIN_PC25__LCDDAT21>,
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<PIN_PC26__LCDDAT22>,
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<PIN_PC27__LCDDAT23>;
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bias-disable;
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};
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pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 {
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pinmux = <PIN_PC10__LCDDAT2>,
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<PIN_PC11__LCDDAT3>,
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<PIN_PC12__LCDDAT4>,
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<PIN_PC13__LCDDAT5>,
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<PIN_PC14__LCDDAT6>,
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<PIN_PC15__LCDDAT7>,
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<PIN_PC16__LCDDAT10>,
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<PIN_PC17__LCDDAT11>,
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<PIN_PC18__LCDDAT12>,
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<PIN_PC19__LCDDAT13>,
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<PIN_PC20__LCDDAT14>,
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<PIN_PC21__LCDDAT15>,
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<PIN_PC22__LCDDAT18>,
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<PIN_PC23__LCDDAT19>,
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<PIN_PC24__LCDDAT20>,
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<PIN_PC25__LCDDAT21>,
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<PIN_PC26__LCDDAT22>,
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<PIN_PC27__LCDDAT23>;
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bias-disable;
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};
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pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
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pinctrl_sdmmc0_default: sdmmc0_default {
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cmd_data {
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pinmux = <PIN_PA1__SDMMC0_CMD>,
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<PIN_PA2__SDMMC0_DAT0>,
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<PIN_PA3__SDMMC0_DAT1>,
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@@ -124,24 +124,24 @@
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bias-disable;
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};
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pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
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ck_cd_vddsel {
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pinmux = <PIN_PA0__SDMMC0_CK>,
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<PIN_PA11__SDMMC0_VDDSEL>,
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<PIN_PA12__SDMMC0_WP>,
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<PIN_PA13__SDMMC0_CD>;
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bias-disable;
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};
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};
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pinctrl_uart0_default: uart0_default {
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pinmux = <PIN_PB26__URXD0>,
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<PIN_PB27__UTXD0>;
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bias-disable;
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};
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pinctrl_uart0_default: uart0_default {
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pinmux = <PIN_PB26__URXD0>,
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<PIN_PB27__UTXD0>;
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bias-disable;
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};
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pinctrl_onewire_tm_default: onewire_tm_default {
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pinmux = <PIN_PC9__GPIO>;
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bias-pull-up;
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};
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pinctrl_onewire_tm_default: onewire_tm_default {
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pinmux = <PIN_PC9__GPIO>;
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bias-pull-up;
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};
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};
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};
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@@ -86,75 +86,73 @@
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};
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};
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pioA: gpio@fc038000 {
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pioA: pinctrl@fc038000 {
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status = "okay";
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pinctrl {
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pinctrl_i2c1_default: i2c1_default {
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pinmux = <PIN_PD19__TWD1>,
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<PIN_PD20__TWCK1>;
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bias-disable;
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};
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pinctrl_i2c1_default: i2c1_default {
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pinmux = <PIN_PD19__TWD1>,
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<PIN_PD20__TWCK1>;
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bias-disable;
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};
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pinctrl_macb0_rmii: macb0_rmii {
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pinmux = <PIN_PD1__GRXCK>,
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<PIN_PD2__GTXER>,
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<PIN_PD5__GRX2>,
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<PIN_PD6__GRX3>,
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<PIN_PD7__GTX2>,
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<PIN_PD8__GTX3>,
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<PIN_PD9__GTXCK>,
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<PIN_PD10__GTXEN>,
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<PIN_PD11__GRXDV>,
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<PIN_PD12__GRXER>,
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<PIN_PD13__GRX0>,
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<PIN_PD14__GRX1>,
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<PIN_PD15__GTX0>,
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<PIN_PD16__GTX1>,
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<PIN_PD17__GMDC>,
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<PIN_PD18__GMDIO>;
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bias-disable;
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};
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pinctrl_macb0_rmii: macb0_rmii {
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pinmux = <PIN_PD1__GRXCK>,
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<PIN_PD2__GTXER>,
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<PIN_PD5__GRX2>,
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<PIN_PD6__GRX3>,
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<PIN_PD7__GTX2>,
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<PIN_PD8__GTX3>,
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<PIN_PD9__GTXCK>,
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<PIN_PD10__GTXEN>,
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<PIN_PD11__GRXDV>,
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<PIN_PD12__GRXER>,
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<PIN_PD13__GRX0>,
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<PIN_PD14__GRX1>,
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<PIN_PD15__GTX0>,
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<PIN_PD16__GTX1>,
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<PIN_PD17__GMDC>,
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<PIN_PD18__GMDIO>;
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bias-disable;
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};
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pinctrl_macb0_phy_irq: macb0_phy_irq {
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pinmux = <PIN_PD3__GPIO>;
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bias-disable;
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};
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pinctrl_macb0_phy_irq: macb0_phy_irq {
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pinmux = <PIN_PD3__GPIO>;
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bias-disable;
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};
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pinctrl_macb0_rst: macb0_sw_rst {
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pinmux = <PIN_PD4__GPIO>;
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bias-pull-up;
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};
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pinctrl_macb0_rst: macb0_sw_rst {
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pinmux = <PIN_PD4__GPIO>;
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bias-pull-up;
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};
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pinctrl_mikrobus1_uart: mikrobus1_uart {
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pinmux = <PIN_PB26__URXD0>,
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<PIN_PB27__UTXD0>;
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bias-disable;
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};
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pinctrl_mikrobus1_uart: mikrobus1_uart {
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pinmux = <PIN_PB26__URXD0>,
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<PIN_PB27__UTXD0>;
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bias-disable;
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};
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pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default {
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pinmux = <PIN_PA6__QSPI1_SCK>,
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<PIN_PA11__QSPI1_CS>;
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bias-disable;
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};
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pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default {
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pinmux = <PIN_PA6__QSPI1_SCK>,
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<PIN_PA11__QSPI1_CS>;
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bias-disable;
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};
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pinctrl_qspi1_dat_default: qspi1_dat_default {
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pinmux = <PIN_PA7__QSPI1_IO0>,
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<PIN_PA8__QSPI1_IO1>,
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<PIN_PA9__QSPI1_IO2>,
|
||||
<PIN_PA10__QSPI1_IO3>;
|
||||
bias-pull-up;
|
||||
};
|
||||
pinctrl_qspi1_dat_default: qspi1_dat_default {
|
||||
pinmux = <PIN_PA7__QSPI1_IO0>,
|
||||
<PIN_PA8__QSPI1_IO1>,
|
||||
<PIN_PA9__QSPI1_IO2>,
|
||||
<PIN_PA10__QSPI1_IO3>;
|
||||
bias-pull-up;
|
||||
};
|
||||
|
||||
pinctrl_sdmmc0_default: sdmmc0_default {
|
||||
pinmux = <PIN_PA1__SDMMC0_CMD>,
|
||||
<PIN_PA2__SDMMC0_DAT0>,
|
||||
<PIN_PA3__SDMMC0_DAT1>,
|
||||
<PIN_PA4__SDMMC0_DAT2>,
|
||||
<PIN_PA5__SDMMC0_DAT3>,
|
||||
<PIN_PA0__SDMMC0_CK>,
|
||||
<PIN_PA13__SDMMC0_CD>;
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_sdmmc0_default: sdmmc0_default {
|
||||
pinmux = <PIN_PA1__SDMMC0_CMD>,
|
||||
<PIN_PA2__SDMMC0_DAT0>,
|
||||
<PIN_PA3__SDMMC0_DAT1>,
|
||||
<PIN_PA4__SDMMC0_DAT2>,
|
||||
<PIN_PA5__SDMMC0_DAT3>,
|
||||
<PIN_PA0__SDMMC0_CK>,
|
||||
<PIN_PA13__SDMMC0_CD>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -94,7 +94,7 @@
|
||||
sdmmc0: sdio-host@a0000000 {
|
||||
bus-width = <8>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
|
||||
pinctrl-0 = <&pinctrl_sdmmc0_default>;
|
||||
status = "okay";
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
@@ -102,7 +102,7 @@
|
||||
sdmmc1: sdio-host@b0000000 {
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>;
|
||||
pinctrl-0 = <&pinctrl_sdmmc1_default>;
|
||||
status = "disabled"; /* conflicts with nand and qspi0*/
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
@@ -137,34 +137,34 @@
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fc038000 {
|
||||
pinctrl {
|
||||
pinctrl_i2c1_default: i2c1_default {
|
||||
pinmux = <PIN_PC6__TWD1>,
|
||||
<PIN_PC7__TWCK1>;
|
||||
bias-disable;
|
||||
};
|
||||
pioA: pinctrl@fc038000 {
|
||||
pinctrl_i2c1_default: i2c1_default {
|
||||
pinmux = <PIN_PC6__TWD1>,
|
||||
<PIN_PC7__TWCK1>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_macb0_phy_irq: macb0_phy_irq {
|
||||
pinmux = <PIN_PB24__GPIO>;
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_macb0_phy_irq: macb0_phy_irq {
|
||||
pinmux = <PIN_PB24__GPIO>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_macb0_rmii: macb0_rmii {
|
||||
pinmux = <PIN_PB14__GTXCK>,
|
||||
<PIN_PB15__GTXEN>,
|
||||
<PIN_PB16__GRXDV>,
|
||||
<PIN_PB17__GRXER>,
|
||||
<PIN_PB18__GRX0>,
|
||||
<PIN_PB19__GRX1>,
|
||||
<PIN_PB20__GTX0>,
|
||||
<PIN_PB21__GTX1>,
|
||||
<PIN_PB22__GMDC>,
|
||||
<PIN_PB23__GMDIO>;
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_macb0_rmii: macb0_rmii {
|
||||
pinmux = <PIN_PB14__GTXCK>,
|
||||
<PIN_PB15__GTXEN>,
|
||||
<PIN_PB16__GRXDV>,
|
||||
<PIN_PB17__GRXER>,
|
||||
<PIN_PB18__GRX0>,
|
||||
<PIN_PB19__GRX1>,
|
||||
<PIN_PB20__GTX0>,
|
||||
<PIN_PB21__GTX1>,
|
||||
<PIN_PB22__GMDC>,
|
||||
<PIN_PB23__GMDIO>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
|
||||
pinctrl_sdmmc0_default: sdmmc0_default {
|
||||
cmd_dat {
|
||||
pinmux = <PIN_PA1__SDMMC0_CMD>,
|
||||
<PIN_PA2__SDMMC0_DAT0>,
|
||||
<PIN_PA3__SDMMC0_DAT1>,
|
||||
@@ -178,7 +178,7 @@
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
|
||||
pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
|
||||
ck_cd {
|
||||
pinmux = <PIN_PA0__SDMMC0_CK>,
|
||||
<PIN_PA10__SDMMC0_RSTN>,
|
||||
<PIN_PA11__SDMMC0_VDDSEL>,
|
||||
@@ -186,8 +186,10 @@
|
||||
bias-disable;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default {
|
||||
pinctrl_sdmmc1_default: sdmmc1_default {
|
||||
cmd_dat {
|
||||
pinmux = <PIN_PA28__SDMMC1_CMD>,
|
||||
<PIN_PA18__SDMMC1_DAT0>,
|
||||
<PIN_PA19__SDMMC1_DAT1>,
|
||||
@@ -197,34 +199,34 @@
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
|
||||
pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default {
|
||||
ck_cd {
|
||||
pinmux = <PIN_PA22__SDMMC1_CK>,
|
||||
<PIN_PA30__SDMMC1_CD>;
|
||||
bias-disable;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_uart0_default: uart0_default {
|
||||
pinmux = <PIN_PB26__URXD0>,
|
||||
<PIN_PB27__UTXD0>;
|
||||
bias-disable;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
pinctrl_uart0_default: uart0_default {
|
||||
pinmux = <PIN_PB26__URXD0>,
|
||||
<PIN_PB27__UTXD0>;
|
||||
bias-disable;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
|
||||
pinctrl_usb_default: usb_default {
|
||||
pinmux = <PIN_PB12__GPIO>;
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_usb_default: usb_default {
|
||||
pinmux = <PIN_PB12__GPIO>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_usba_vbus: usba_vbus {
|
||||
pinmux = <PIN_PB11__GPIO>;
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_usba_vbus: usba_vbus {
|
||||
pinmux = <PIN_PB11__GPIO>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_onewire_tm_default: onewire_tm_default {
|
||||
pinmux = <PIN_PB31__GPIO>;
|
||||
bias-pull-up;
|
||||
};
|
||||
pinctrl_onewire_tm_default: onewire_tm_default {
|
||||
pinmux = <PIN_PB31__GPIO>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -44,7 +44,7 @@
|
||||
sdmmc0: sdio-host@a0000000 {
|
||||
bus-width = <8>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sdmmc0_cmd_dat_default &pinctrl_sdmmc0_ck_cd_default>;
|
||||
pinctrl-0 = <&pinctrl_sdmmc0_default>;
|
||||
status = "okay";
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
@@ -52,7 +52,7 @@
|
||||
sdmmc1: sdio-host@b0000000 {
|
||||
bus-width = <4>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_sdmmc1_cmd_dat_default &pinctrl_sdmmc1_ck_cd_default>;
|
||||
pinctrl-0 = <&pinctrl_sdmmc1_default>;
|
||||
status = "okay"; /* conflict with qspi0 */
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
@@ -143,85 +143,85 @@
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fc038000 {
|
||||
pinctrl {
|
||||
pinctrl_i2c1_default: i2c1_default {
|
||||
pinmux = <PIN_PD4__TWD1>,
|
||||
<PIN_PD5__TWCK1>;
|
||||
bias-disable;
|
||||
};
|
||||
pioA: pinctrl@fc038000 {
|
||||
pinctrl_i2c1_default: i2c1_default {
|
||||
pinmux = <PIN_PD4__TWD1>,
|
||||
<PIN_PD5__TWCK1>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_lcd_base: pinctrl_lcd_base {
|
||||
pinmux = <PIN_PC30__LCDVSYNC>,
|
||||
<PIN_PC31__LCDHSYNC>,
|
||||
<PIN_PD1__LCDDEN>,
|
||||
<PIN_PD0__LCDPCK>;
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_lcd_base: pinctrl_lcd_base {
|
||||
pinmux = <PIN_PC30__LCDVSYNC>,
|
||||
<PIN_PC31__LCDHSYNC>,
|
||||
<PIN_PD1__LCDDEN>,
|
||||
<PIN_PD0__LCDPCK>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_lcd_pwm: pinctrl_lcd_pwm {
|
||||
pinmux = <PIN_PC28__LCDPWM>;
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_lcd_pwm: pinctrl_lcd_pwm {
|
||||
pinmux = <PIN_PC28__LCDPWM>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 {
|
||||
pinmux = <PIN_PC10__LCDDAT2>,
|
||||
<PIN_PC11__LCDDAT3>,
|
||||
<PIN_PC12__LCDDAT4>,
|
||||
<PIN_PC13__LCDDAT5>,
|
||||
<PIN_PC14__LCDDAT6>,
|
||||
<PIN_PC15__LCDDAT7>,
|
||||
<PIN_PC16__LCDDAT10>,
|
||||
<PIN_PC17__LCDDAT11>,
|
||||
<PIN_PC18__LCDDAT12>,
|
||||
<PIN_PC19__LCDDAT13>,
|
||||
<PIN_PC20__LCDDAT14>,
|
||||
<PIN_PC21__LCDDAT15>,
|
||||
<PIN_PC22__LCDDAT18>,
|
||||
<PIN_PC23__LCDDAT19>,
|
||||
<PIN_PC24__LCDDAT20>,
|
||||
<PIN_PC25__LCDDAT21>,
|
||||
<PIN_PC26__LCDDAT22>,
|
||||
<PIN_PC27__LCDDAT23>;
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_lcd_rgb666: pinctrl_lcd_rgb666 {
|
||||
pinmux = <PIN_PC10__LCDDAT2>,
|
||||
<PIN_PC11__LCDDAT3>,
|
||||
<PIN_PC12__LCDDAT4>,
|
||||
<PIN_PC13__LCDDAT5>,
|
||||
<PIN_PC14__LCDDAT6>,
|
||||
<PIN_PC15__LCDDAT7>,
|
||||
<PIN_PC16__LCDDAT10>,
|
||||
<PIN_PC17__LCDDAT11>,
|
||||
<PIN_PC18__LCDDAT12>,
|
||||
<PIN_PC19__LCDDAT13>,
|
||||
<PIN_PC20__LCDDAT14>,
|
||||
<PIN_PC21__LCDDAT15>,
|
||||
<PIN_PC22__LCDDAT18>,
|
||||
<PIN_PC23__LCDDAT19>,
|
||||
<PIN_PC24__LCDDAT20>,
|
||||
<PIN_PC25__LCDDAT21>,
|
||||
<PIN_PC26__LCDDAT22>,
|
||||
<PIN_PC27__LCDDAT23>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_macb0_phy_irq: macb0_phy_irq {
|
||||
pinmux = <PIN_PC9__GPIO>;
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_macb0_phy_irq: macb0_phy_irq {
|
||||
pinmux = <PIN_PC9__GPIO>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_macb0_rmii: macb0_rmii {
|
||||
pinmux = <PIN_PB14__GTXCK>,
|
||||
<PIN_PB15__GTXEN>,
|
||||
<PIN_PB16__GRXDV>,
|
||||
<PIN_PB17__GRXER>,
|
||||
<PIN_PB18__GRX0>,
|
||||
<PIN_PB19__GRX1>,
|
||||
<PIN_PB20__GTX0>,
|
||||
<PIN_PB21__GTX1>,
|
||||
<PIN_PB22__GMDC>,
|
||||
<PIN_PB23__GMDIO>;
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_macb0_rmii: macb0_rmii {
|
||||
pinmux = <PIN_PB14__GTXCK>,
|
||||
<PIN_PB15__GTXEN>,
|
||||
<PIN_PB16__GRXDV>,
|
||||
<PIN_PB17__GRXER>,
|
||||
<PIN_PB18__GRX0>,
|
||||
<PIN_PB19__GRX1>,
|
||||
<PIN_PB20__GTX0>,
|
||||
<PIN_PB21__GTX1>,
|
||||
<PIN_PB22__GMDC>,
|
||||
<PIN_PB23__GMDIO>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_qspi0_sck_cs_default: qspi0_sck_cs_default {
|
||||
pinmux = <PIN_PA22__QSPI0_SCK>,
|
||||
<PIN_PA23__QSPI0_CS>;
|
||||
bias-disable;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
pinctrl_qspi0_sck_cs_default: qspi0_sck_cs_default {
|
||||
pinmux = <PIN_PA22__QSPI0_SCK>,
|
||||
<PIN_PA23__QSPI0_CS>;
|
||||
bias-disable;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
|
||||
pinctrl_qspi0_dat_default: qspi0_dat_default {
|
||||
pinmux = <PIN_PA24__QSPI0_IO0>,
|
||||
<PIN_PA25__QSPI0_IO1>,
|
||||
<PIN_PA26__QSPI0_IO2>,
|
||||
<PIN_PA27__QSPI0_IO3>;
|
||||
bias-pull-up;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
pinctrl_qspi0_dat_default: qspi0_dat_default {
|
||||
pinmux = <PIN_PA24__QSPI0_IO0>,
|
||||
<PIN_PA25__QSPI0_IO1>,
|
||||
<PIN_PA26__QSPI0_IO2>,
|
||||
<PIN_PA27__QSPI0_IO3>;
|
||||
bias-pull-up;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
|
||||
pinctrl_sdmmc0_cmd_dat_default: sdmmc0_cmd_dat_default {
|
||||
pinctrl_sdmmc0_default: sdmmc0_default {
|
||||
cmd_dat {
|
||||
pinmux = <PIN_PA1__SDMMC0_CMD>,
|
||||
<PIN_PA2__SDMMC0_DAT0>,
|
||||
<PIN_PA3__SDMMC0_DAT1>,
|
||||
@@ -235,7 +235,7 @@
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
|
||||
pinctrl_sdmmc0_ck_cd_default: sdmmc0_ck_cd_default {
|
||||
ck_cd_default {
|
||||
pinmux = <PIN_PA0__SDMMC0_CK>,
|
||||
<PIN_PA10__SDMMC0_RSTN>,
|
||||
<PIN_PA11__SDMMC0_VDDSEL>,
|
||||
@@ -243,8 +243,10 @@
|
||||
bias-disable;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_sdmmc1_cmd_dat_default: sdmmc1_cmd_dat_default {
|
||||
pinctrl_sdmmc1_default: sdmmc1_default {
|
||||
cmd_dat {
|
||||
pinmux = <PIN_PA28__SDMMC1_CMD>,
|
||||
<PIN_PA18__SDMMC1_DAT0>,
|
||||
<PIN_PA19__SDMMC1_DAT1>,
|
||||
@@ -254,42 +256,42 @@
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
|
||||
pinctrl_sdmmc1_ck_cd_default: sdmmc1_ck_cd_default {
|
||||
ck_cd {
|
||||
pinmux = <PIN_PA22__SDMMC1_CK>,
|
||||
<PIN_PA30__SDMMC1_CD>;
|
||||
bias-disable;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
};
|
||||
|
||||
pinctrl_spi0_default: spi0_default {
|
||||
pinmux = <PIN_PA14__SPI0_SPCK>,
|
||||
<PIN_PA15__SPI0_MOSI>,
|
||||
<PIN_PA16__SPI0_MISO>;
|
||||
bias-disable;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
pinctrl_spi0_default: spi0_default {
|
||||
pinmux = <PIN_PA14__SPI0_SPCK>,
|
||||
<PIN_PA15__SPI0_MOSI>,
|
||||
<PIN_PA16__SPI0_MISO>;
|
||||
bias-disable;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
|
||||
pinctrl_uart1_default: uart1_default {
|
||||
pinmux = <PIN_PD2__URXD1>,
|
||||
<PIN_PD3__UTXD1>;
|
||||
bias-disable;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
pinctrl_uart1_default: uart1_default {
|
||||
pinmux = <PIN_PD2__URXD1>,
|
||||
<PIN_PD3__UTXD1>;
|
||||
bias-disable;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
|
||||
pinctrl_usb_default: usb_default {
|
||||
pinmux = <PIN_PB10__GPIO>;
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_usb_default: usb_default {
|
||||
pinmux = <PIN_PB10__GPIO>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_usba_vbus: usba_vbus {
|
||||
pinmux = <PIN_PA31__GPIO>;
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_usba_vbus: usba_vbus {
|
||||
pinmux = <PIN_PA31__GPIO>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_onewire_tm_default: onewire_tm_default {
|
||||
pinmux = <PIN_PB0__GPIO>;
|
||||
bias-pull-up;
|
||||
};
|
||||
pinctrl_onewire_tm_default: onewire_tm_default {
|
||||
pinmux = <PIN_PB0__GPIO>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -799,18 +799,13 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pioA: gpio@fc038000 {
|
||||
compatible = "atmel,sama5d2-gpio";
|
||||
pioA: pinctrl@fc038000 {
|
||||
compatible = "atmel,sama5d2-pinctrl";
|
||||
reg = <0xfc038000 0x600>;
|
||||
clocks = <&pioA_clk>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
u-boot,dm-pre-reloc;
|
||||
|
||||
pinctrl {
|
||||
compatible = "atmel,sama5d2-pinctrl";
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -103,54 +103,52 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
pioA: gpio@fc038000 {
|
||||
pinctrl {
|
||||
pinctrl_i2c0_default: i2c0_default {
|
||||
pinmux = <PIN_PD21__TWD0>,
|
||||
<PIN_PD22__TWCK0>;
|
||||
bias-disable;
|
||||
};
|
||||
pioA: pinctrl@fc038000 {
|
||||
pinctrl_i2c0_default: i2c0_default {
|
||||
pinmux = <PIN_PD21__TWD0>,
|
||||
<PIN_PD22__TWCK0>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_i2c1_default: i2c1_default {
|
||||
pinmux = <PIN_PD4__TWD1>,
|
||||
<PIN_PD5__TWCK1>;
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_i2c1_default: i2c1_default {
|
||||
pinmux = <PIN_PD4__TWD1>,
|
||||
<PIN_PD5__TWCK1>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_macb0_phy_irq: macb0_phy_irq {
|
||||
pinmux = <PIN_PD31__GPIO>;
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_macb0_phy_irq: macb0_phy_irq {
|
||||
pinmux = <PIN_PD31__GPIO>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_macb0_rmii: macb0_rmii {
|
||||
pinmux = <PIN_PD9__GTXCK>,
|
||||
<PIN_PD10__GTXEN>,
|
||||
<PIN_PD11__GRXDV>,
|
||||
<PIN_PD12__GRXER>,
|
||||
<PIN_PD13__GRX0>,
|
||||
<PIN_PD14__GRX1>,
|
||||
<PIN_PD15__GTX0>,
|
||||
<PIN_PD16__GTX1>,
|
||||
<PIN_PD17__GMDC>,
|
||||
<PIN_PD18__GMDIO>;
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_macb0_rmii: macb0_rmii {
|
||||
pinmux = <PIN_PD9__GTXCK>,
|
||||
<PIN_PD10__GTXEN>,
|
||||
<PIN_PD11__GRXDV>,
|
||||
<PIN_PD12__GRXER>,
|
||||
<PIN_PD13__GRX0>,
|
||||
<PIN_PD14__GRX1>,
|
||||
<PIN_PD15__GTX0>,
|
||||
<PIN_PD16__GTX1>,
|
||||
<PIN_PD17__GMDC>,
|
||||
<PIN_PD18__GMDIO>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default {
|
||||
pinmux = <PIN_PB5__QSPI1_SCK>,
|
||||
<PIN_PB6__QSPI1_CS>;
|
||||
bias-disable;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
pinctrl_qspi1_sck_cs_default: qspi1_sck_cs_default {
|
||||
pinmux = <PIN_PB5__QSPI1_SCK>,
|
||||
<PIN_PB6__QSPI1_CS>;
|
||||
bias-disable;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
|
||||
pinctrl_qspi1_dat_default: qspi1_dat_default {
|
||||
pinmux = <PIN_PB7__QSPI1_IO0>,
|
||||
<PIN_PB8__QSPI1_IO1>,
|
||||
<PIN_PB9__QSPI1_IO2>,
|
||||
<PIN_PB10__QSPI1_IO3>;
|
||||
bias-pull-up;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
pinctrl_qspi1_dat_default: qspi1_dat_default {
|
||||
pinmux = <PIN_PB7__QSPI1_IO0>,
|
||||
<PIN_PB8__QSPI1_IO1>,
|
||||
<PIN_PB9__QSPI1_IO2>,
|
||||
<PIN_PB10__QSPI1_IO3>;
|
||||
bias-pull-up;
|
||||
u-boot,dm-pre-reloc;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -41,36 +41,34 @@
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fc038000 {
|
||||
pinctrl {
|
||||
pinctrl_macb0_phy_irq: macb0_phy_irq {
|
||||
pinmux = <PIN_PB24__GPIO>;
|
||||
bias-disable;
|
||||
};
|
||||
pioA: pinctrl@fc038000 {
|
||||
pinctrl_macb0_phy_irq: macb0_phy_irq {
|
||||
pinmux = <PIN_PB24__GPIO>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_macb0_rmii: macb0_rmii {
|
||||
pinmux = <PIN_PB14__GTXCK>,
|
||||
<PIN_PB15__GTXEN>,
|
||||
<PIN_PB16__GRXDV>,
|
||||
<PIN_PB17__GRXER>,
|
||||
<PIN_PB18__GRX0>,
|
||||
<PIN_PB19__GRX1>,
|
||||
<PIN_PB20__GTX0>,
|
||||
<PIN_PB21__GTX1>,
|
||||
<PIN_PB22__GMDC>,
|
||||
<PIN_PB23__GMDIO>;
|
||||
bias-disable;
|
||||
};
|
||||
pinctrl_macb0_rmii: macb0_rmii {
|
||||
pinmux = <PIN_PB14__GTXCK>,
|
||||
<PIN_PB15__GTXEN>,
|
||||
<PIN_PB16__GRXDV>,
|
||||
<PIN_PB17__GRXER>,
|
||||
<PIN_PB18__GRX0>,
|
||||
<PIN_PB19__GRX1>,
|
||||
<PIN_PB20__GTX0>,
|
||||
<PIN_PB21__GTX1>,
|
||||
<PIN_PB22__GMDC>,
|
||||
<PIN_PB23__GMDIO>;
|
||||
bias-disable;
|
||||
};
|
||||
|
||||
pinctrl_qspi1_default: qspi1_default {
|
||||
pinmux = <PIN_PB5__QSPI1_SCK>,
|
||||
<PIN_PB6__QSPI1_CS>,
|
||||
<PIN_PB7__QSPI1_IO0>,
|
||||
<PIN_PB8__QSPI1_IO1>,
|
||||
<PIN_PB9__QSPI1_IO2>,
|
||||
<PIN_PB10__QSPI1_IO3>;
|
||||
bias-pull-up;
|
||||
};
|
||||
pinctrl_qspi1_default: qspi1_default {
|
||||
pinmux = <PIN_PB5__QSPI1_SCK>,
|
||||
<PIN_PB6__QSPI1_CS>,
|
||||
<PIN_PB7__QSPI1_IO0>,
|
||||
<PIN_PB8__QSPI1_IO1>,
|
||||
<PIN_PB9__QSPI1_IO2>,
|
||||
<PIN_PB10__QSPI1_IO3>;
|
||||
bias-pull-up;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user