kbuild: move asm-offsets.c from SoC directory to arch/$(ARCH)/lib
U-Boot has supported two kinds of asm-offsets.h.
One is generic for all architectures and its source is located at
./lib/asm-offsets.c.
The other is SoC specific and its source is under SoC directory.
The problem here is that only boards with SoC directory can use
the asm-offsets infrastructure.
Putting asm-offsets.c right under CPU directory does not work.
Now a new demand is coming. PowerPC folks want to use asm-offsets.
But no PowerPC boards have SoC directory.
It seems inconsistent that some boards add asm-offsets.c to SoC
directoreis and some to CPU directories.
It looks more reasonable to put asm-offsets.c under arch/$(ARCH)/lib.
This commit merges asm-offsets.c under SoC directories into
arch/$(ARCH)/lib/asm-offsets.c.
By the way, I doubt the necessity of some entries in asm-offsets.c.
I am leaving refactoring to the board maintainers.
Please check "TODO" in the comment blocks in
arch/{arm,nds32}/lib/asm-offsets.c.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Yuantian Tang <Yuantian.Tang@freescale.com>
This commit is contained in:
Masahiro Yamada
Tom Rini
parent
b97241b312
commit
254d68b601
8
Kbuild
8
Kbuild
@ -42,13 +42,13 @@ $(obj)/$(generic-offsets-file): lib/asm-offsets.s Kbuild
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# 2) Generate asm-offsets.h
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#
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ifneq ($(wildcard $(srctree)/$(CPUDIR)/$(SOC)/asm-offsets.c),)
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ifneq ($(wildcard $(srctree)/arch/$(ARCH)/lib/asm-offsets.c),)
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offsets-file := include/generated/asm-offsets.h
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endif
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always += $(offsets-file)
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targets += $(offsets-file)
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targets += $(CPUDIR)/$(SOC)/asm-offsets.s
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targets += arch/$(ARCH)/lib/asm-offsets.s
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# Default sed regexp - multiline due to syntax constraints
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@ -79,9 +79,9 @@ define cmd_offsets
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endef
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# We use internal kbuild rules to avoid the "is up to date" message from make
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$(CPUDIR)/$(SOC)/asm-offsets.s: $(CPUDIR)/$(SOC)/asm-offsets.c FORCE
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arch/$(ARCH)/lib/asm-offsets.s: arch/$(ARCH)/lib/asm-offsets.c FORCE
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$(Q)mkdir -p $(dir $@)
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$(call if_changed_dep,cc_s_c)
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$(obj)/$(offsets-file): $(CPUDIR)/$(SOC)/asm-offsets.s
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$(obj)/$(offsets-file): arch/$(ARCH)/lib/asm-offsets.s Kbuild
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$(call cmd,offsets)
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@ -1,71 +0,0 @@
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/*
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* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
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*
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* This program is used to generate definitions needed by
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* assembly language modules.
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*
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* We use the technique used in the OSF Mach kernel code:
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* generate asm statements containing #defines,
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* compile this file to assembler, and then extract the
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* #defines from the assembly-language output.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/imx-regs.h>
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#include <linux/kbuild.h>
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int main(void)
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{
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/* Round up to make sure size gives nice stack alignment */
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DEFINE(CLKCTL_CCMR, offsetof(struct ccm_regs, ccmr));
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DEFINE(CLKCTL_PDR0, offsetof(struct ccm_regs, pdr0));
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DEFINE(CLKCTL_PDR1, offsetof(struct ccm_regs, pdr1));
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DEFINE(CLKCTL_PDR2, offsetof(struct ccm_regs, pdr2));
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DEFINE(CLKCTL_PDR3, offsetof(struct ccm_regs, pdr3));
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DEFINE(CLKCTL_PDR4, offsetof(struct ccm_regs, pdr4));
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DEFINE(CLKCTL_RCSR, offsetof(struct ccm_regs, rcsr));
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DEFINE(CLKCTL_MPCTL, offsetof(struct ccm_regs, mpctl));
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DEFINE(CLKCTL_PPCTL, offsetof(struct ccm_regs, ppctl));
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DEFINE(CLKCTL_ACMR, offsetof(struct ccm_regs, acmr));
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DEFINE(CLKCTL_COSR, offsetof(struct ccm_regs, cosr));
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DEFINE(CLKCTL_CGR0, offsetof(struct ccm_regs, cgr0));
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DEFINE(CLKCTL_CGR1, offsetof(struct ccm_regs, cgr1));
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DEFINE(CLKCTL_CGR2, offsetof(struct ccm_regs, cgr2));
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DEFINE(CLKCTL_CGR3, offsetof(struct ccm_regs, cgr3));
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/* Multi-Layer AHB Crossbar Switch */
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DEFINE(MAX_MPR0, offsetof(struct max_regs, mpr0));
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DEFINE(MAX_SGPCR0, offsetof(struct max_regs, sgpcr0));
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DEFINE(MAX_MPR1, offsetof(struct max_regs, mpr1));
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DEFINE(MAX_SGPCR1, offsetof(struct max_regs, sgpcr1));
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DEFINE(MAX_MPR2, offsetof(struct max_regs, mpr2));
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DEFINE(MAX_SGPCR2, offsetof(struct max_regs, sgpcr2));
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DEFINE(MAX_MPR3, offsetof(struct max_regs, mpr3));
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DEFINE(MAX_SGPCR3, offsetof(struct max_regs, sgpcr3));
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DEFINE(MAX_MPR4, offsetof(struct max_regs, mpr4));
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DEFINE(MAX_SGPCR4, offsetof(struct max_regs, sgpcr4));
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DEFINE(MAX_MGPCR0, offsetof(struct max_regs, mgpcr0));
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DEFINE(MAX_MGPCR1, offsetof(struct max_regs, mgpcr1));
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DEFINE(MAX_MGPCR2, offsetof(struct max_regs, mgpcr2));
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DEFINE(MAX_MGPCR3, offsetof(struct max_regs, mgpcr3));
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DEFINE(MAX_MGPCR4, offsetof(struct max_regs, mgpcr4));
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DEFINE(MAX_MGPCR5, offsetof(struct max_regs, mgpcr5));
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/* AHB <-> IP-Bus Interface */
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DEFINE(AIPS_MPR_0_7, offsetof(struct aips_regs, mpr_0_7));
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DEFINE(AIPS_MPR_8_15, offsetof(struct aips_regs, mpr_8_15));
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DEFINE(AIPS_PACR_0_7, offsetof(struct aips_regs, pacr_0_7));
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DEFINE(AIPS_PACR_8_15, offsetof(struct aips_regs, pacr_8_15));
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DEFINE(AIPS_PACR_16_23, offsetof(struct aips_regs, pacr_16_23));
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DEFINE(AIPS_PACR_24_31, offsetof(struct aips_regs, pacr_24_31));
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DEFINE(AIPS_OPACR_0_7, offsetof(struct aips_regs, opacr_0_7));
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DEFINE(AIPS_OPACR_8_15, offsetof(struct aips_regs, opacr_8_15));
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DEFINE(AIPS_OPACR_16_23, offsetof(struct aips_regs, opacr_16_23));
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DEFINE(AIPS_OPACR_24_31, offsetof(struct aips_regs, opacr_24_31));
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DEFINE(AIPS_OPACR_32_39, offsetof(struct aips_regs, opacr_32_39));
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return 0;
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}
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@ -1,62 +0,0 @@
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/*
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* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
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*
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* This program is used to generate definitions needed by
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* assembly language modules.
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*
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* We use the technique used in the OSF Mach kernel code:
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* generate asm statements containing #defines,
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* compile this file to assembler, and then extract the
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* #defines from the assembly-language output.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/mb86r0x.h>
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#include <linux/kbuild.h>
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int main(void)
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{
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/* ddr2 controller */
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DEFINE(DDR2_DRIC, offsetof(struct mb86r0x_ddr2c, dric));
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DEFINE(DDR2_DRIC1, offsetof(struct mb86r0x_ddr2c, dric1));
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DEFINE(DDR2_DRIC2, offsetof(struct mb86r0x_ddr2c, dric2));
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DEFINE(DDR2_DRCA, offsetof(struct mb86r0x_ddr2c, drca));
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DEFINE(DDR2_DRCM, offsetof(struct mb86r0x_ddr2c, drcm));
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DEFINE(DDR2_DRCST1, offsetof(struct mb86r0x_ddr2c, drcst1));
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DEFINE(DDR2_DRCST2, offsetof(struct mb86r0x_ddr2c, drcst2));
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DEFINE(DDR2_DRCR, offsetof(struct mb86r0x_ddr2c, drcr));
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DEFINE(DDR2_DRCF, offsetof(struct mb86r0x_ddr2c, drcf));
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DEFINE(DDR2_DRASR, offsetof(struct mb86r0x_ddr2c, drasr));
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DEFINE(DDR2_DRIMS, offsetof(struct mb86r0x_ddr2c, drims));
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DEFINE(DDR2_DROS, offsetof(struct mb86r0x_ddr2c, dros));
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DEFINE(DDR2_DRIBSODT1, offsetof(struct mb86r0x_ddr2c, dribsodt1));
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DEFINE(DDR2_DROABA, offsetof(struct mb86r0x_ddr2c, droaba));
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DEFINE(DDR2_DROBS, offsetof(struct mb86r0x_ddr2c, drobs));
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/* clock reset generator */
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DEFINE(CRG_CRPR, offsetof(struct mb86r0x_crg, crpr));
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DEFINE(CRG_CRHA, offsetof(struct mb86r0x_crg, crha));
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DEFINE(CRG_CRPA, offsetof(struct mb86r0x_crg, crpa));
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DEFINE(CRG_CRPB, offsetof(struct mb86r0x_crg, crpb));
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DEFINE(CRG_CRHB, offsetof(struct mb86r0x_crg, crhb));
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DEFINE(CRG_CRAM, offsetof(struct mb86r0x_crg, cram));
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/* chip control module */
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DEFINE(CCNT_CDCRC, offsetof(struct mb86r0x_ccnt, cdcrc));
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/* external bus interface */
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DEFINE(MEMC_MCFMODE0, offsetof(struct mb86r0x_memc, mcfmode[0]));
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DEFINE(MEMC_MCFMODE2, offsetof(struct mb86r0x_memc, mcfmode[2]));
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DEFINE(MEMC_MCFMODE4, offsetof(struct mb86r0x_memc, mcfmode[4]));
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DEFINE(MEMC_MCFTIM0, offsetof(struct mb86r0x_memc, mcftim[0]));
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DEFINE(MEMC_MCFTIM2, offsetof(struct mb86r0x_memc, mcftim[2]));
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DEFINE(MEMC_MCFTIM4, offsetof(struct mb86r0x_memc, mcftim[4]));
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DEFINE(MEMC_MCFAREA0, offsetof(struct mb86r0x_memc, mcfarea[0]));
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DEFINE(MEMC_MCFAREA2, offsetof(struct mb86r0x_memc, mcfarea[2]));
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DEFINE(MEMC_MCFAREA4, offsetof(struct mb86r0x_memc, mcfarea[4]));
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return 0;
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}
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@ -1,57 +0,0 @@
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/*
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* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
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*
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* This program is used to generate definitions needed by
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* assembly language modules.
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*
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* We use the technique used in the OSF Mach kernel code:
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* generate asm statements containing #defines,
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* compile this file to assembler, and then extract the
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* #defines from the assembly-language output.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/imx-regs.h>
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#include <linux/kbuild.h>
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int main(void)
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{
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/* Clock Control Module */
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DEFINE(CCM_CCTL, offsetof(struct ccm_regs, cctl));
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DEFINE(CCM_CGCR0, offsetof(struct ccm_regs, cgr0));
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DEFINE(CCM_CGCR1, offsetof(struct ccm_regs, cgr1));
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DEFINE(CCM_CGCR2, offsetof(struct ccm_regs, cgr2));
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DEFINE(CCM_PCDR2, offsetof(struct ccm_regs, pcdr[2]));
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DEFINE(CCM_MCR, offsetof(struct ccm_regs, mcr));
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/* Enhanced SDRAM Controller */
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DEFINE(ESDRAMC_ESDCTL0, offsetof(struct esdramc_regs, ctl0));
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DEFINE(ESDRAMC_ESDCFG0, offsetof(struct esdramc_regs, cfg0));
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DEFINE(ESDRAMC_ESDMISC, offsetof(struct esdramc_regs, misc));
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/* Multi-Layer AHB Crossbar Switch */
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DEFINE(MAX_MPR0, offsetof(struct max_regs, mpr0));
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DEFINE(MAX_SGPCR0, offsetof(struct max_regs, sgpcr0));
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DEFINE(MAX_MPR1, offsetof(struct max_regs, mpr1));
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DEFINE(MAX_SGPCR1, offsetof(struct max_regs, sgpcr1));
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DEFINE(MAX_MPR2, offsetof(struct max_regs, mpr2));
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DEFINE(MAX_SGPCR2, offsetof(struct max_regs, sgpcr2));
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DEFINE(MAX_MPR3, offsetof(struct max_regs, mpr3));
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DEFINE(MAX_SGPCR3, offsetof(struct max_regs, sgpcr3));
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DEFINE(MAX_MPR4, offsetof(struct max_regs, mpr4));
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DEFINE(MAX_SGPCR4, offsetof(struct max_regs, sgpcr4));
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DEFINE(MAX_MGPCR0, offsetof(struct max_regs, mgpcr0));
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DEFINE(MAX_MGPCR1, offsetof(struct max_regs, mgpcr1));
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DEFINE(MAX_MGPCR2, offsetof(struct max_regs, mgpcr2));
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DEFINE(MAX_MGPCR3, offsetof(struct max_regs, mgpcr3));
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DEFINE(MAX_MGPCR4, offsetof(struct max_regs, mgpcr4));
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/* AHB <-> IP-Bus Interface */
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DEFINE(AIPS_MPR_0_7, offsetof(struct aips_regs, mpr_0_7));
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DEFINE(AIPS_MPR_8_15, offsetof(struct aips_regs, mpr_8_15));
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return 0;
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}
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@ -1,47 +0,0 @@
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/*
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* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
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*
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* This program is used to generate definitions needed by
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* assembly language modules.
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*
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* We use the technique used in the OSF Mach kernel code:
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* generate asm statements containing #defines,
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* compile this file to assembler, and then extract the
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* #defines from the assembly-language output.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/imx-regs.h>
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#include <linux/kbuild.h>
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int main(void)
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{
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DEFINE(AIPI1_PSR0, IMX_AIPI1_BASE + offsetof(struct aipi_regs, psr0));
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DEFINE(AIPI1_PSR1, IMX_AIPI1_BASE + offsetof(struct aipi_regs, psr1));
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DEFINE(AIPI2_PSR0, IMX_AIPI2_BASE + offsetof(struct aipi_regs, psr0));
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DEFINE(AIPI2_PSR1, IMX_AIPI2_BASE + offsetof(struct aipi_regs, psr1));
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DEFINE(CSCR, IMX_PLL_BASE + offsetof(struct pll_regs, cscr));
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DEFINE(MPCTL0, IMX_PLL_BASE + offsetof(struct pll_regs, mpctl0));
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DEFINE(SPCTL0, IMX_PLL_BASE + offsetof(struct pll_regs, spctl0));
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DEFINE(PCDR0, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr0));
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DEFINE(PCDR1, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr1));
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DEFINE(PCCR0, IMX_PLL_BASE + offsetof(struct pll_regs, pccr0));
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DEFINE(PCCR1, IMX_PLL_BASE + offsetof(struct pll_regs, pccr1));
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DEFINE(ESDCTL0_ROF, offsetof(struct esdramc_regs, esdctl0));
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DEFINE(ESDCFG0_ROF, offsetof(struct esdramc_regs, esdcfg0));
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DEFINE(ESDCTL1_ROF, offsetof(struct esdramc_regs, esdctl1));
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DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
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DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
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DEFINE(GPCR, IMX_SYSTEM_CTL_BASE +
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offsetof(struct system_control_regs, gpcr));
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DEFINE(FMCR, IMX_SYSTEM_CTL_BASE +
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offsetof(struct system_control_regs, fmcr));
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return 0;
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}
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@ -1,73 +0,0 @@
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/*
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* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
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*
|
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* This program is used to generate definitions needed by
|
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* assembly language modules.
|
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*
|
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* We use the technique used in the OSF Mach kernel code:
|
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* generate asm statements containing #defines,
|
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* compile this file to assembler, and then extract the
|
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* #defines from the assembly-language output.
|
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/arch/imx-regs.h>
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#include <linux/kbuild.h>
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int main(void)
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{
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/* Round up to make sure size gives nice stack alignment */
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DEFINE(CLKCTL_CCMR, offsetof(struct clkctl, ccr));
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DEFINE(CLKCTL_CCDR, offsetof(struct clkctl, ccdr));
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DEFINE(CLKCTL_CSR, offsetof(struct clkctl, csr));
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DEFINE(CLKCTL_CCSR, offsetof(struct clkctl, ccsr));
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DEFINE(CLKCTL_CACRR, offsetof(struct clkctl, cacrr));
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DEFINE(CLKCTL_CBCDR, offsetof(struct clkctl, cbcdr));
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DEFINE(CLKCTL_CBCMR, offsetof(struct clkctl, cbcmr));
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DEFINE(CLKCTL_CSCMR1, offsetof(struct clkctl, cscmr1));
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DEFINE(CLKCTL_CSCMR2, offsetof(struct clkctl, cscmr2));
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DEFINE(CLKCTL_CSCDR1, offsetof(struct clkctl, cscdr1));
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DEFINE(CLKCTL_CS1CDR, offsetof(struct clkctl, cs1cdr));
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DEFINE(CLKCTL_CS2CDR, offsetof(struct clkctl, cs2cdr));
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DEFINE(CLKCTL_CDCDR, offsetof(struct clkctl, cdcdr));
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DEFINE(CLKCTL_CHSCCDR, offsetof(struct clkctl, chsccdr));
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DEFINE(CLKCTL_CSCDR2, offsetof(struct clkctl, cscdr2));
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DEFINE(CLKCTL_CSCDR3, offsetof(struct clkctl, cscdr3));
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DEFINE(CLKCTL_CSCDR4, offsetof(struct clkctl, cscdr4));
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DEFINE(CLKCTL_CWDR, offsetof(struct clkctl, cwdr));
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DEFINE(CLKCTL_CDHIPR, offsetof(struct clkctl, cdhipr));
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DEFINE(CLKCTL_CDCR, offsetof(struct clkctl, cdcr));
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DEFINE(CLKCTL_CTOR, offsetof(struct clkctl, ctor));
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DEFINE(CLKCTL_CLPCR, offsetof(struct clkctl, clpcr));
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DEFINE(CLKCTL_CISR, offsetof(struct clkctl, cisr));
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DEFINE(CLKCTL_CIMR, offsetof(struct clkctl, cimr));
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DEFINE(CLKCTL_CCOSR, offsetof(struct clkctl, ccosr));
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DEFINE(CLKCTL_CGPR, offsetof(struct clkctl, cgpr));
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DEFINE(CLKCTL_CCGR0, offsetof(struct clkctl, ccgr0));
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DEFINE(CLKCTL_CCGR1, offsetof(struct clkctl, ccgr1));
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DEFINE(CLKCTL_CCGR2, offsetof(struct clkctl, ccgr2));
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DEFINE(CLKCTL_CCGR3, offsetof(struct clkctl, ccgr3));
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DEFINE(CLKCTL_CCGR4, offsetof(struct clkctl, ccgr4));
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DEFINE(CLKCTL_CCGR5, offsetof(struct clkctl, ccgr5));
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DEFINE(CLKCTL_CCGR6, offsetof(struct clkctl, ccgr6));
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DEFINE(CLKCTL_CMEOR, offsetof(struct clkctl, cmeor));
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#if defined(CONFIG_MX53)
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DEFINE(CLKCTL_CCGR7, offsetof(struct clkctl, ccgr7));
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#endif
|
||||
|
||||
/* DPLL */
|
||||
DEFINE(PLL_DP_CTL, offsetof(struct dpll, dp_ctl));
|
||||
DEFINE(PLL_DP_CONFIG, offsetof(struct dpll, dp_config));
|
||||
DEFINE(PLL_DP_OP, offsetof(struct dpll, dp_op));
|
||||
DEFINE(PLL_DP_MFD, offsetof(struct dpll, dp_mfd));
|
||||
DEFINE(PLL_DP_MFN, offsetof(struct dpll, dp_mfn));
|
||||
DEFINE(PLL_DP_HFS_OP, offsetof(struct dpll, dp_hfs_op));
|
||||
DEFINE(PLL_DP_HFS_MFD, offsetof(struct dpll, dp_hfs_mfd));
|
||||
DEFINE(PLL_DP_HFS_MFN, offsetof(struct dpll, dp_hfs_mfn));
|
||||
|
||||
return 0;
|
||||
}
|
||||
248
arch/arm/lib/asm-offsets.c
Normal file
248
arch/arm/lib/asm-offsets.c
Normal file
@ -0,0 +1,248 @@
|
||||
/*
|
||||
* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
|
||||
*
|
||||
* This program is used to generate definitions needed by
|
||||
* assembly language modules.
|
||||
*
|
||||
* We use the technique used in the OSF Mach kernel code:
|
||||
* generate asm statements containing #defines,
|
||||
* compile this file to assembler, and then extract the
|
||||
* #defines from the assembly-language output.
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <linux/kbuild.h>
|
||||
|
||||
#if defined(CONFIG_MB86R0x)
|
||||
#include <asm/arch/mb86r0x.h>
|
||||
#endif
|
||||
#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX35) \
|
||||
|| defined(CONFIG_MX51) || defined(CONFIG_MX53)
|
||||
#include <asm/arch/imx-regs.h>
|
||||
#endif
|
||||
|
||||
int main(void)
|
||||
{
|
||||
/*
|
||||
* TODO : Check if each entry in this file is really necessary.
|
||||
* - struct mb86r0x_ddr2
|
||||
* - struct mb86r0x_memc
|
||||
* - struct esdramc_regs
|
||||
* - struct max_regs
|
||||
* - struct aips_regs
|
||||
* - struct aipi_regs
|
||||
* - struct clkctl
|
||||
* - struct dpll
|
||||
* are used only for generating asm-offsets.h.
|
||||
* It means their offset addresses are referenced only from assembly
|
||||
* code. Is it better to define the macros directly in headers?
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_MB86R0x)
|
||||
/* ddr2 controller */
|
||||
DEFINE(DDR2_DRIC, offsetof(struct mb86r0x_ddr2c, dric));
|
||||
DEFINE(DDR2_DRIC1, offsetof(struct mb86r0x_ddr2c, dric1));
|
||||
DEFINE(DDR2_DRIC2, offsetof(struct mb86r0x_ddr2c, dric2));
|
||||
DEFINE(DDR2_DRCA, offsetof(struct mb86r0x_ddr2c, drca));
|
||||
DEFINE(DDR2_DRCM, offsetof(struct mb86r0x_ddr2c, drcm));
|
||||
DEFINE(DDR2_DRCST1, offsetof(struct mb86r0x_ddr2c, drcst1));
|
||||
DEFINE(DDR2_DRCST2, offsetof(struct mb86r0x_ddr2c, drcst2));
|
||||
DEFINE(DDR2_DRCR, offsetof(struct mb86r0x_ddr2c, drcr));
|
||||
DEFINE(DDR2_DRCF, offsetof(struct mb86r0x_ddr2c, drcf));
|
||||
DEFINE(DDR2_DRASR, offsetof(struct mb86r0x_ddr2c, drasr));
|
||||
DEFINE(DDR2_DRIMS, offsetof(struct mb86r0x_ddr2c, drims));
|
||||
DEFINE(DDR2_DROS, offsetof(struct mb86r0x_ddr2c, dros));
|
||||
DEFINE(DDR2_DRIBSODT1, offsetof(struct mb86r0x_ddr2c, dribsodt1));
|
||||
DEFINE(DDR2_DROABA, offsetof(struct mb86r0x_ddr2c, droaba));
|
||||
DEFINE(DDR2_DROBS, offsetof(struct mb86r0x_ddr2c, drobs));
|
||||
|
||||
/* clock reset generator */
|
||||
DEFINE(CRG_CRPR, offsetof(struct mb86r0x_crg, crpr));
|
||||
DEFINE(CRG_CRHA, offsetof(struct mb86r0x_crg, crha));
|
||||
DEFINE(CRG_CRPA, offsetof(struct mb86r0x_crg, crpa));
|
||||
DEFINE(CRG_CRPB, offsetof(struct mb86r0x_crg, crpb));
|
||||
DEFINE(CRG_CRHB, offsetof(struct mb86r0x_crg, crhb));
|
||||
DEFINE(CRG_CRAM, offsetof(struct mb86r0x_crg, cram));
|
||||
|
||||
/* chip control module */
|
||||
DEFINE(CCNT_CDCRC, offsetof(struct mb86r0x_ccnt, cdcrc));
|
||||
|
||||
/* external bus interface */
|
||||
DEFINE(MEMC_MCFMODE0, offsetof(struct mb86r0x_memc, mcfmode[0]));
|
||||
DEFINE(MEMC_MCFMODE2, offsetof(struct mb86r0x_memc, mcfmode[2]));
|
||||
DEFINE(MEMC_MCFMODE4, offsetof(struct mb86r0x_memc, mcfmode[4]));
|
||||
DEFINE(MEMC_MCFTIM0, offsetof(struct mb86r0x_memc, mcftim[0]));
|
||||
DEFINE(MEMC_MCFTIM2, offsetof(struct mb86r0x_memc, mcftim[2]));
|
||||
DEFINE(MEMC_MCFTIM4, offsetof(struct mb86r0x_memc, mcftim[4]));
|
||||
DEFINE(MEMC_MCFAREA0, offsetof(struct mb86r0x_memc, mcfarea[0]));
|
||||
DEFINE(MEMC_MCFAREA2, offsetof(struct mb86r0x_memc, mcfarea[2]));
|
||||
DEFINE(MEMC_MCFAREA4, offsetof(struct mb86r0x_memc, mcfarea[4]));
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MX25)
|
||||
/* Clock Control Module */
|
||||
DEFINE(CCM_CCTL, offsetof(struct ccm_regs, cctl));
|
||||
DEFINE(CCM_CGCR0, offsetof(struct ccm_regs, cgr0));
|
||||
DEFINE(CCM_CGCR1, offsetof(struct ccm_regs, cgr1));
|
||||
DEFINE(CCM_CGCR2, offsetof(struct ccm_regs, cgr2));
|
||||
DEFINE(CCM_PCDR2, offsetof(struct ccm_regs, pcdr[2]));
|
||||
DEFINE(CCM_MCR, offsetof(struct ccm_regs, mcr));
|
||||
|
||||
/* Enhanced SDRAM Controller */
|
||||
DEFINE(ESDRAMC_ESDCTL0, offsetof(struct esdramc_regs, ctl0));
|
||||
DEFINE(ESDRAMC_ESDCFG0, offsetof(struct esdramc_regs, cfg0));
|
||||
DEFINE(ESDRAMC_ESDMISC, offsetof(struct esdramc_regs, misc));
|
||||
|
||||
/* Multi-Layer AHB Crossbar Switch */
|
||||
DEFINE(MAX_MPR0, offsetof(struct max_regs, mpr0));
|
||||
DEFINE(MAX_SGPCR0, offsetof(struct max_regs, sgpcr0));
|
||||
DEFINE(MAX_MPR1, offsetof(struct max_regs, mpr1));
|
||||
DEFINE(MAX_SGPCR1, offsetof(struct max_regs, sgpcr1));
|
||||
DEFINE(MAX_MPR2, offsetof(struct max_regs, mpr2));
|
||||
DEFINE(MAX_SGPCR2, offsetof(struct max_regs, sgpcr2));
|
||||
DEFINE(MAX_MPR3, offsetof(struct max_regs, mpr3));
|
||||
DEFINE(MAX_SGPCR3, offsetof(struct max_regs, sgpcr3));
|
||||
DEFINE(MAX_MPR4, offsetof(struct max_regs, mpr4));
|
||||
DEFINE(MAX_SGPCR4, offsetof(struct max_regs, sgpcr4));
|
||||
DEFINE(MAX_MGPCR0, offsetof(struct max_regs, mgpcr0));
|
||||
DEFINE(MAX_MGPCR1, offsetof(struct max_regs, mgpcr1));
|
||||
DEFINE(MAX_MGPCR2, offsetof(struct max_regs, mgpcr2));
|
||||
DEFINE(MAX_MGPCR3, offsetof(struct max_regs, mgpcr3));
|
||||
DEFINE(MAX_MGPCR4, offsetof(struct max_regs, mgpcr4));
|
||||
|
||||
/* AHB <-> IP-Bus Interface */
|
||||
DEFINE(AIPS_MPR_0_7, offsetof(struct aips_regs, mpr_0_7));
|
||||
DEFINE(AIPS_MPR_8_15, offsetof(struct aips_regs, mpr_8_15));
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MX27)
|
||||
DEFINE(AIPI1_PSR0, IMX_AIPI1_BASE + offsetof(struct aipi_regs, psr0));
|
||||
DEFINE(AIPI1_PSR1, IMX_AIPI1_BASE + offsetof(struct aipi_regs, psr1));
|
||||
DEFINE(AIPI2_PSR0, IMX_AIPI2_BASE + offsetof(struct aipi_regs, psr0));
|
||||
DEFINE(AIPI2_PSR1, IMX_AIPI2_BASE + offsetof(struct aipi_regs, psr1));
|
||||
|
||||
DEFINE(CSCR, IMX_PLL_BASE + offsetof(struct pll_regs, cscr));
|
||||
DEFINE(MPCTL0, IMX_PLL_BASE + offsetof(struct pll_regs, mpctl0));
|
||||
DEFINE(SPCTL0, IMX_PLL_BASE + offsetof(struct pll_regs, spctl0));
|
||||
DEFINE(PCDR0, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr0));
|
||||
DEFINE(PCDR1, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr1));
|
||||
DEFINE(PCCR0, IMX_PLL_BASE + offsetof(struct pll_regs, pccr0));
|
||||
DEFINE(PCCR1, IMX_PLL_BASE + offsetof(struct pll_regs, pccr1));
|
||||
|
||||
DEFINE(ESDCTL0_ROF, offsetof(struct esdramc_regs, esdctl0));
|
||||
DEFINE(ESDCFG0_ROF, offsetof(struct esdramc_regs, esdcfg0));
|
||||
DEFINE(ESDCTL1_ROF, offsetof(struct esdramc_regs, esdctl1));
|
||||
DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
|
||||
DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
|
||||
|
||||
DEFINE(GPCR, IMX_SYSTEM_CTL_BASE +
|
||||
offsetof(struct system_control_regs, gpcr));
|
||||
DEFINE(FMCR, IMX_SYSTEM_CTL_BASE +
|
||||
offsetof(struct system_control_regs, fmcr));
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MX35)
|
||||
/* Round up to make sure size gives nice stack alignment */
|
||||
DEFINE(CLKCTL_CCMR, offsetof(struct ccm_regs, ccmr));
|
||||
DEFINE(CLKCTL_PDR0, offsetof(struct ccm_regs, pdr0));
|
||||
DEFINE(CLKCTL_PDR1, offsetof(struct ccm_regs, pdr1));
|
||||
DEFINE(CLKCTL_PDR2, offsetof(struct ccm_regs, pdr2));
|
||||
DEFINE(CLKCTL_PDR3, offsetof(struct ccm_regs, pdr3));
|
||||
DEFINE(CLKCTL_PDR4, offsetof(struct ccm_regs, pdr4));
|
||||
DEFINE(CLKCTL_RCSR, offsetof(struct ccm_regs, rcsr));
|
||||
DEFINE(CLKCTL_MPCTL, offsetof(struct ccm_regs, mpctl));
|
||||
DEFINE(CLKCTL_PPCTL, offsetof(struct ccm_regs, ppctl));
|
||||
DEFINE(CLKCTL_ACMR, offsetof(struct ccm_regs, acmr));
|
||||
DEFINE(CLKCTL_COSR, offsetof(struct ccm_regs, cosr));
|
||||
DEFINE(CLKCTL_CGR0, offsetof(struct ccm_regs, cgr0));
|
||||
DEFINE(CLKCTL_CGR1, offsetof(struct ccm_regs, cgr1));
|
||||
DEFINE(CLKCTL_CGR2, offsetof(struct ccm_regs, cgr2));
|
||||
DEFINE(CLKCTL_CGR3, offsetof(struct ccm_regs, cgr3));
|
||||
|
||||
/* Multi-Layer AHB Crossbar Switch */
|
||||
DEFINE(MAX_MPR0, offsetof(struct max_regs, mpr0));
|
||||
DEFINE(MAX_SGPCR0, offsetof(struct max_regs, sgpcr0));
|
||||
DEFINE(MAX_MPR1, offsetof(struct max_regs, mpr1));
|
||||
DEFINE(MAX_SGPCR1, offsetof(struct max_regs, sgpcr1));
|
||||
DEFINE(MAX_MPR2, offsetof(struct max_regs, mpr2));
|
||||
DEFINE(MAX_SGPCR2, offsetof(struct max_regs, sgpcr2));
|
||||
DEFINE(MAX_MPR3, offsetof(struct max_regs, mpr3));
|
||||
DEFINE(MAX_SGPCR3, offsetof(struct max_regs, sgpcr3));
|
||||
DEFINE(MAX_MPR4, offsetof(struct max_regs, mpr4));
|
||||
DEFINE(MAX_SGPCR4, offsetof(struct max_regs, sgpcr4));
|
||||
DEFINE(MAX_MGPCR0, offsetof(struct max_regs, mgpcr0));
|
||||
DEFINE(MAX_MGPCR1, offsetof(struct max_regs, mgpcr1));
|
||||
DEFINE(MAX_MGPCR2, offsetof(struct max_regs, mgpcr2));
|
||||
DEFINE(MAX_MGPCR3, offsetof(struct max_regs, mgpcr3));
|
||||
DEFINE(MAX_MGPCR4, offsetof(struct max_regs, mgpcr4));
|
||||
DEFINE(MAX_MGPCR5, offsetof(struct max_regs, mgpcr5));
|
||||
|
||||
/* AHB <-> IP-Bus Interface */
|
||||
DEFINE(AIPS_MPR_0_7, offsetof(struct aips_regs, mpr_0_7));
|
||||
DEFINE(AIPS_MPR_8_15, offsetof(struct aips_regs, mpr_8_15));
|
||||
DEFINE(AIPS_PACR_0_7, offsetof(struct aips_regs, pacr_0_7));
|
||||
DEFINE(AIPS_PACR_8_15, offsetof(struct aips_regs, pacr_8_15));
|
||||
DEFINE(AIPS_PACR_16_23, offsetof(struct aips_regs, pacr_16_23));
|
||||
DEFINE(AIPS_PACR_24_31, offsetof(struct aips_regs, pacr_24_31));
|
||||
DEFINE(AIPS_OPACR_0_7, offsetof(struct aips_regs, opacr_0_7));
|
||||
DEFINE(AIPS_OPACR_8_15, offsetof(struct aips_regs, opacr_8_15));
|
||||
DEFINE(AIPS_OPACR_16_23, offsetof(struct aips_regs, opacr_16_23));
|
||||
DEFINE(AIPS_OPACR_24_31, offsetof(struct aips_regs, opacr_24_31));
|
||||
DEFINE(AIPS_OPACR_32_39, offsetof(struct aips_regs, opacr_32_39));
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MX51) || defined(CONFIG_MX53)
|
||||
/* Round up to make sure size gives nice stack alignment */
|
||||
DEFINE(CLKCTL_CCMR, offsetof(struct clkctl, ccr));
|
||||
DEFINE(CLKCTL_CCDR, offsetof(struct clkctl, ccdr));
|
||||
DEFINE(CLKCTL_CSR, offsetof(struct clkctl, csr));
|
||||
DEFINE(CLKCTL_CCSR, offsetof(struct clkctl, ccsr));
|
||||
DEFINE(CLKCTL_CACRR, offsetof(struct clkctl, cacrr));
|
||||
DEFINE(CLKCTL_CBCDR, offsetof(struct clkctl, cbcdr));
|
||||
DEFINE(CLKCTL_CBCMR, offsetof(struct clkctl, cbcmr));
|
||||
DEFINE(CLKCTL_CSCMR1, offsetof(struct clkctl, cscmr1));
|
||||
DEFINE(CLKCTL_CSCMR2, offsetof(struct clkctl, cscmr2));
|
||||
DEFINE(CLKCTL_CSCDR1, offsetof(struct clkctl, cscdr1));
|
||||
DEFINE(CLKCTL_CS1CDR, offsetof(struct clkctl, cs1cdr));
|
||||
DEFINE(CLKCTL_CS2CDR, offsetof(struct clkctl, cs2cdr));
|
||||
DEFINE(CLKCTL_CDCDR, offsetof(struct clkctl, cdcdr));
|
||||
DEFINE(CLKCTL_CHSCCDR, offsetof(struct clkctl, chsccdr));
|
||||
DEFINE(CLKCTL_CSCDR2, offsetof(struct clkctl, cscdr2));
|
||||
DEFINE(CLKCTL_CSCDR3, offsetof(struct clkctl, cscdr3));
|
||||
DEFINE(CLKCTL_CSCDR4, offsetof(struct clkctl, cscdr4));
|
||||
DEFINE(CLKCTL_CWDR, offsetof(struct clkctl, cwdr));
|
||||
DEFINE(CLKCTL_CDHIPR, offsetof(struct clkctl, cdhipr));
|
||||
DEFINE(CLKCTL_CDCR, offsetof(struct clkctl, cdcr));
|
||||
DEFINE(CLKCTL_CTOR, offsetof(struct clkctl, ctor));
|
||||
DEFINE(CLKCTL_CLPCR, offsetof(struct clkctl, clpcr));
|
||||
DEFINE(CLKCTL_CISR, offsetof(struct clkctl, cisr));
|
||||
DEFINE(CLKCTL_CIMR, offsetof(struct clkctl, cimr));
|
||||
DEFINE(CLKCTL_CCOSR, offsetof(struct clkctl, ccosr));
|
||||
DEFINE(CLKCTL_CGPR, offsetof(struct clkctl, cgpr));
|
||||
DEFINE(CLKCTL_CCGR0, offsetof(struct clkctl, ccgr0));
|
||||
DEFINE(CLKCTL_CCGR1, offsetof(struct clkctl, ccgr1));
|
||||
DEFINE(CLKCTL_CCGR2, offsetof(struct clkctl, ccgr2));
|
||||
DEFINE(CLKCTL_CCGR3, offsetof(struct clkctl, ccgr3));
|
||||
DEFINE(CLKCTL_CCGR4, offsetof(struct clkctl, ccgr4));
|
||||
DEFINE(CLKCTL_CCGR5, offsetof(struct clkctl, ccgr5));
|
||||
DEFINE(CLKCTL_CCGR6, offsetof(struct clkctl, ccgr6));
|
||||
DEFINE(CLKCTL_CMEOR, offsetof(struct clkctl, cmeor));
|
||||
#if defined(CONFIG_MX53)
|
||||
DEFINE(CLKCTL_CCGR7, offsetof(struct clkctl, ccgr7));
|
||||
#endif
|
||||
|
||||
/* DPLL */
|
||||
DEFINE(PLL_DP_CTL, offsetof(struct dpll, dp_ctl));
|
||||
DEFINE(PLL_DP_CONFIG, offsetof(struct dpll, dp_config));
|
||||
DEFINE(PLL_DP_OP, offsetof(struct dpll, dp_op));
|
||||
DEFINE(PLL_DP_MFD, offsetof(struct dpll, dp_mfd));
|
||||
DEFINE(PLL_DP_MFN, offsetof(struct dpll, dp_mfn));
|
||||
DEFINE(PLL_DP_HFS_OP, offsetof(struct dpll, dp_hfs_op));
|
||||
DEFINE(PLL_DP_HFS_MFD, offsetof(struct dpll, dp_hfs_mfd));
|
||||
DEFINE(PLL_DP_HFS_MFN, offsetof(struct dpll, dp_hfs_mfn));
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -1,44 +0,0 @@
|
||||
/*
|
||||
* Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
|
||||
*
|
||||
* Generate definitions needed by assembly language modules.
|
||||
* This code generates raw asm output which is post-processed to extract
|
||||
* and format the required data.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#include <common.h>
|
||||
|
||||
#include <linux/kbuild.h>
|
||||
|
||||
int main(void)
|
||||
{
|
||||
#ifdef CONFIG_FTSMC020
|
||||
OFFSET(FTSMC020_BANK0_CR, ftsmc020, bank[0].cr);
|
||||
OFFSET(FTSMC020_BANK0_TPR, ftsmc020, bank[0].tpr);
|
||||
#endif
|
||||
BLANK();
|
||||
#ifdef CONFIG_FTAHBC020S
|
||||
OFFSET(FTAHBC020S_SLAVE_BSR_4, ftahbc02s, s_bsr[4]);
|
||||
OFFSET(FTAHBC020S_SLAVE_BSR_6, ftahbc02s, s_bsr[6]);
|
||||
OFFSET(FTAHBC020S_CR, ftahbc02s, cr);
|
||||
#endif
|
||||
BLANK();
|
||||
#ifdef CONFIG_FTPMU010
|
||||
OFFSET(FTPMU010_PDLLCR0, ftpmu010, PDLLCR0);
|
||||
#endif
|
||||
BLANK();
|
||||
#ifdef CONFIG_FTSDMC021
|
||||
OFFSET(FTSDMC021_TP1, ftsdmc021, tp1);
|
||||
OFFSET(FTSDMC021_TP2, ftsdmc021, tp2);
|
||||
OFFSET(FTSDMC021_CR1, ftsdmc021, cr1);
|
||||
OFFSET(FTSDMC021_CR2, ftsdmc021, cr2);
|
||||
OFFSET(FTSDMC021_BANK0_BSR, ftsdmc021, bank0_bsr);
|
||||
OFFSET(FTSDMC021_BANK1_BSR, ftsdmc021, bank1_bsr);
|
||||
OFFSET(FTSDMC021_BANK2_BSR, ftsdmc021, bank2_bsr);
|
||||
OFFSET(FTSDMC021_BANK3_BSR, ftsdmc021, bank3_bsr);
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
@ -15,16 +15,43 @@
|
||||
|
||||
int main(void)
|
||||
{
|
||||
/*
|
||||
* TODO : Check if each entry in this file is really necessary.
|
||||
* - struct ftahbc02s
|
||||
* - struct ftsdmc021
|
||||
* - struct andes_pcu
|
||||
* - struct dwcddr21mctl
|
||||
* are used only for generating asm-offsets.h.
|
||||
* It means their offset addresses are referenced only from assembly
|
||||
* code. Is it better to define the macros directly in headers?
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_FTSMC020
|
||||
OFFSET(FTSMC020_BANK0_CR, ftsmc020, bank[0].cr);
|
||||
OFFSET(FTSMC020_BANK0_TPR, ftsmc020, bank[0].tpr);
|
||||
#endif
|
||||
BLANK();
|
||||
#ifdef CONFIG_FTAHBC020S
|
||||
OFFSET(FTAHBC020S_SLAVE_BSR_4, ftahbc02s, s_bsr[4]);
|
||||
OFFSET(FTAHBC020S_SLAVE_BSR_6, ftahbc02s, s_bsr[6]);
|
||||
OFFSET(FTAHBC020S_CR, ftahbc02s, cr);
|
||||
#endif
|
||||
BLANK();
|
||||
#ifdef CONFIG_FTPMU010
|
||||
OFFSET(FTPMU010_PDLLCR0, ftpmu010, PDLLCR0);
|
||||
#endif
|
||||
BLANK();
|
||||
#ifdef CONFIG_FTSDMC021
|
||||
OFFSET(FTSDMC021_TP1, ftsdmc021, tp1);
|
||||
OFFSET(FTSDMC021_TP2, ftsdmc021, tp2);
|
||||
OFFSET(FTSDMC021_CR1, ftsdmc021, cr1);
|
||||
OFFSET(FTSDMC021_CR2, ftsdmc021, cr2);
|
||||
OFFSET(FTSDMC021_BANK0_BSR, ftsdmc021, bank0_bsr);
|
||||
OFFSET(FTSDMC021_BANK1_BSR, ftsdmc021, bank1_bsr);
|
||||
OFFSET(FTSDMC021_BANK2_BSR, ftsdmc021, bank2_bsr);
|
||||
OFFSET(FTSDMC021_BANK3_BSR, ftsdmc021, bank3_bsr);
|
||||
#endif
|
||||
BLANK();
|
||||
#ifdef CONFIG_ANDES_PCU
|
||||
OFFSET(ANDES_PCU_PCS4, andes_pcu, pcs4.parm); /* 0x104 */
|
||||
#endif
|
||||
@ -50,5 +77,6 @@ int main(void)
|
||||
OFFSET(DWCDDR21MCTL_DTAR, dwcddr21mctl, dtar); /* 0xa4 */
|
||||
OFFSET(DWCDDR21MCTL_MR, dwcddr21mctl, mr); /* 0x1f0 */
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
Loading…
Reference in New Issue
Block a user