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net: phy: ti: Fix clock output DT property

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The code block reading the DT property for the clock output control was
before the phy's DT node pointer was set, so it could never work.  Move
it after the node pointer is set.

Also store the unsigned 32-bit property into an unsigned value, not a
signed value, as the former will cause a problem if value overflows.
For instance, if one were to add 0xffffffff as a code to mean the clock
output should be turned off.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Janine Hagemann <j.hagemann@phytec.de>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This commit is contained in:
Trent Piepho 2019-05-10 17:49:08 +00:00 committed by Joe Hershberger
parent c2df9b49ce
commit 2529dea893
1 changed files with 2 additions and 8 deletions
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10
drivers/net/phy/ti.c
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@ -103,7 +103,7 @@ struct dp83867_private {
int io_impedance;
bool rxctrl_strap_quirk;
int port_mirroring;
int clk_output_sel;
unsigned int clk_output_sel;
};
static int dp83867_config_port_mirroring(struct phy_device *phydev)
@ -136,17 +136,11 @@ static int dp83867_of_init(struct phy_device *phydev)
ofnode node;
u16 val;
/* Optional configuration */
node = phy_get_ofnode(phydev);
if (!ofnode_valid(node))
return -EINVAL;
/*
* Keep the default value if ti,clk-output-sel is not set
* or to high
*/
/* Keep the default value if ti,clk-output-sel is not set */
dp83867->clk_output_sel =
ofnode_read_u32_default(node, "ti,clk-output-sel",
DP83867_CLK_O_SEL_REF_CLK);