Clock patches for u-boot/next

This is mostly cleanups/consolidations. clk_free is made to return void, and the
 CCF wrappers present in almost every CCF clock are consolidated. I would
 particularly like to have the latter upstream, since there are at least two
 series adding support for new CCF drivers (imx8mq and imxrt1170) which can
 benefit from these commits.
 
 I had to fix up the last commit since I missed an include for at91.
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/11521
 -----BEGIN PGP SIGNATURE-----
 
 iQGTBAABCgB9FiEEkGEdW86NSNID6GAoPuiP7LShEG4FAmJErVFfFIAAAAAALgAo
 aXNzdWVyLWZwckBub3RhdGlvbnMub3BlbnBncC5maWZ0aGhvcnNlbWFuLm5ldDkw
 NjExRDVCQ0U4RDQ4RDIwM0U4NjAyODNFRTg4RkVDQjRBMTEwNkUACgkQPuiP7LSh
 EG6J7Af+K3FTOmxuocqNBaT6IPEIYkgTnxdih8b6taYhhrTkq2YPRjKhK64Seldf
 gID8/+3Ya46/xprp9dRl1NcCFl5ou7htAF0FwLSGms8pxCJkARMY0VxxCBfnJt18
 zFjjTNxxPVBVrCEAiRc3ncL69XF49Xp276ERcAGA8DqOXie9wTViasQ3emQS5k4Q
 +AiRSuJs1dOZYv9K4yc70DpZdPzwKdCt7ykzCoVvHp+W7TeJ5zpzcCrVbTduVwVd
 0IOpF0iF0EGJcFCE+S0YS6lPrw7fEpwgmeZsYIW7U8X9Avo83X+ZXlr0K6dzyJTa
 Bo2jfJgohAAclz9/bbMEqP2zgcnxIw==
 =qrkR
 -----END PGP SIGNATURE-----

Merge tag 'clk-2022.04-next' of https://source.denx.de/u-boot/custodians/u-boot-clk into next

Clock patches for u-boot/next

This is mostly cleanups/consolidations. clk_free is made to return void, and the
CCF wrappers present in almost every CCF clock are consolidated. I would
particularly like to have the latter upstream, since there are at least two
series adding support for new CCF drivers (imx8mq and imxrt1170) which can
benefit from these commits.

I had to fix up the last commit since I missed an include for at91.

CI: https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/11521
This commit is contained in:
Tom Rini 2022-03-30 18:08:22 -04:00
commit 23e354f82c
25 changed files with 127 additions and 676 deletions

View File

@ -7,6 +7,7 @@
#include <common.h>
#include <asm/io.h>
#include <clk-uclass.h>
#include <linux/clk-provider.h>
#include "pmc.h"
static int at91_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args)
@ -21,60 +22,12 @@ static int at91_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args)
return 0;
}
static ulong at91_clk_get_rate(struct clk *clk)
{
struct clk *c;
int ret;
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_get_rate(c);
}
static ulong at91_clk_set_rate(struct clk *clk, ulong rate)
{
struct clk *c;
int ret;
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_set_rate(c, rate);
}
static int at91_clk_enable(struct clk *clk)
{
struct clk *c;
int ret;
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_enable(c);
}
static int at91_clk_disable(struct clk *clk)
{
struct clk *c;
int ret;
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_disable(c);
}
const struct clk_ops at91_clk_ops = {
.of_xlate = at91_clk_of_xlate,
.set_rate = at91_clk_set_rate,
.get_rate = at91_clk_get_rate,
.enable = at91_clk_enable,
.disable = at91_clk_disable,
.set_rate = ccf_clk_set_rate,
.get_rate = ccf_clk_get_rate,
.enable = ccf_clk_enable,
.disable = ccf_clk_disable,
};
/**

View File

@ -138,14 +138,7 @@ static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
{
struct ofnode_phandle_args args;
int ret;
ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
index, &args);
return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
index, clk);
return clk_get_by_index_nodev(dev_ofnode(dev), index, clk);
}
int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
@ -400,18 +393,7 @@ int clk_set_defaults(struct udevice *dev, enum clk_defaults_stage stage)
int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
{
int index;
debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
clk->dev = NULL;
index = dev_read_stringlist_search(dev, "clock-names", name);
if (index < 0) {
debug("fdt_stringlist_search() failed: %d\n", index);
return index;
}
return clk_get_by_index(dev, index, clk);
return clk_get_by_name_nodev(dev_ofnode(dev), name, clk);
}
#endif /* OF_REAL */
@ -447,9 +429,7 @@ int clk_release_all(struct clk *clk, int count)
if (ret && ret != -ENOSYS)
return ret;
ret = clk_free(&clk[i]);
if (ret && ret != -ENOSYS)
return ret;
clk_free(&clk[i]);
}
return 0;
@ -472,19 +452,18 @@ int clk_request(struct udevice *dev, struct clk *clk)
return ops->request(clk);
}
int clk_free(struct clk *clk)
void clk_free(struct clk *clk)
{
const struct clk_ops *ops;
debug("%s(clk=%p)\n", __func__, clk);
if (!clk_valid(clk))
return 0;
return;
ops = clk_dev_ops(clk->dev);
if (!ops->rfree)
return 0;
return ops->rfree(clk);
if (ops->rfree)
ops->rfree(clk);
return;
}
ulong clk_get_rate(struct clk *clk)

View File

@ -74,3 +74,68 @@ bool clk_dev_binded(struct clk *clk)
return false;
}
/* Helper functions for clock ops */
ulong ccf_clk_get_rate(struct clk *clk)
{
struct clk *c;
int err = clk_get_by_id(clk->id, &c);
if (err)
return err;
return clk_get_rate(c);
}
ulong ccf_clk_set_rate(struct clk *clk, unsigned long rate)
{
struct clk *c;
int err = clk_get_by_id(clk->id, &c);
if (err)
return err;
return clk_set_rate(c, rate);
}
int ccf_clk_set_parent(struct clk *clk, struct clk *parent)
{
struct clk *c, *p;
int err = clk_get_by_id(clk->id, &c);
if (err)
return err;
err = clk_get_by_id(parent->id, &p);
if (err)
return err;
return clk_set_parent(c, p);
}
static int ccf_clk_endisable(struct clk *clk, bool enable)
{
struct clk *c;
int err = clk_get_by_id(clk->id, &c);
if (err)
return err;
return enable ? clk_enable(c) : clk_disable(c);
}
int ccf_clk_enable(struct clk *clk)
{
return ccf_clk_endisable(clk, true);
}
int ccf_clk_disable(struct clk *clk)
{
return ccf_clk_endisable(clk, false);
}
const struct clk_ops ccf_clk_ops = {
.set_rate = ccf_clk_set_rate,
.get_rate = ccf_clk_get_rate,
.set_parent = ccf_clk_set_parent,
.enable = ccf_clk_enable,
.disable = ccf_clk_disable,
};

View File

@ -101,15 +101,15 @@ static int sandbox_clk_request(struct clk *clk)
return 0;
}
static int sandbox_clk_free(struct clk *clk)
static void sandbox_clk_free(struct clk *clk)
{
struct sandbox_clk_priv *priv = dev_get_priv(clk->dev);
if (clk->id >= SANDBOX_CLK_ID_COUNT)
return -EINVAL;
return;
priv->requested[clk->id] = false;
return 0;
return;
}
static struct clk_ops sandbox_clk_ops = {

View File

@ -137,14 +137,11 @@ int sandbox_clk_test_disable_bulk(struct udevice *dev)
int sandbox_clk_test_free(struct udevice *dev)
{
struct sandbox_clk_test *sbct = dev_get_priv(dev);
int i, ret;
int i;
devm_clk_put(dev, sbct->clkps[SANDBOX_CLK_TEST_ID_DEVM1]);
for (i = 0; i < SANDBOX_CLK_TEST_NON_DEVM_COUNT; i++) {
ret = clk_free(&sbct->clks[i]);
if (ret)
return ret;
}
for (i = 0; i < SANDBOX_CLK_TEST_NON_DEVM_COUNT; i++)
clk_free(&sbct->clks[i]);
return 0;
}

View File

@ -14,79 +14,22 @@
#include "clk.h"
static int imx6q_check_id(ulong id)
static int imx6q_clk_request(struct clk *clk)
{
if (id < IMX6QDL_CLK_DUMMY || id >= IMX6QDL_CLK_END) {
printf("%s: Invalid clk ID #%lu\n", __func__, id);
if (clk->id < IMX6QDL_CLK_DUMMY || clk->id >= IMX6QDL_CLK_END) {
printf("%s: Invalid clk ID #%lu\n", __func__, clk->id);
return -EINVAL;
}
return 0;
}
static ulong imx6q_clk_get_rate(struct clk *clk)
{
struct clk *c;
int ret;
debug("%s(#%lu)\n", __func__, clk->id);
ret = imx6q_check_id(clk->id);
if (ret)
return ret;
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_get_rate(c);
}
static ulong imx6q_clk_set_rate(struct clk *clk, unsigned long rate)
{
debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
return rate;
}
static int __imx6q_clk_enable(struct clk *clk, bool enable)
{
struct clk *c;
int ret = 0;
debug("%s(#%lu) en: %d\n", __func__, clk->id, enable);
ret = imx6q_check_id(clk->id);
if (ret)
return ret;
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
if (enable)
ret = clk_enable(c);
else
ret = clk_disable(c);
return ret;
}
static int imx6q_clk_disable(struct clk *clk)
{
return __imx6q_clk_enable(clk, 0);
}
static int imx6q_clk_enable(struct clk *clk)
{
return __imx6q_clk_enable(clk, 1);
}
static struct clk_ops imx6q_clk_ops = {
.set_rate = imx6q_clk_set_rate,
.get_rate = imx6q_clk_get_rate,
.enable = imx6q_clk_enable,
.disable = imx6q_clk_disable,
.request = imx6q_clk_request,
.set_rate = ccf_clk_set_rate,
.get_rate = ccf_clk_get_rate,
.enable = ccf_clk_enable,
.disable = ccf_clk_disable,
};
static const char *const usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", };

View File

@ -140,92 +140,6 @@ static const char *imx8mm_ecspi2_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sy
static const char *imx8mm_ecspi3_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m",
"sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out", };
static ulong imx8mm_clk_get_rate(struct clk *clk)
{
struct clk *c;
int ret;
debug("%s(#%lu)\n", __func__, clk->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_get_rate(c);
}
static ulong imx8mm_clk_set_rate(struct clk *clk, unsigned long rate)
{
struct clk *c;
int ret;
debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_set_rate(c, rate);
}
static int __imx8mm_clk_enable(struct clk *clk, bool enable)
{
struct clk *c;
int ret;
debug("%s(#%lu) en: %d\n", __func__, clk->id, enable);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
if (enable)
ret = clk_enable(c);
else
ret = clk_disable(c);
return ret;
}
static int imx8mm_clk_disable(struct clk *clk)
{
return __imx8mm_clk_enable(clk, 0);
}
static int imx8mm_clk_enable(struct clk *clk)
{
return __imx8mm_clk_enable(clk, 1);
}
static int imx8mm_clk_set_parent(struct clk *clk, struct clk *parent)
{
struct clk *c, *cp;
int ret;
debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
ret = clk_get_by_id(parent->id, &cp);
if (ret)
return ret;
ret = clk_set_parent(c, cp);
c->dev->parent = cp->dev;
return ret;
}
static struct clk_ops imx8mm_clk_ops = {
.set_rate = imx8mm_clk_set_rate,
.get_rate = imx8mm_clk_get_rate,
.enable = imx8mm_clk_enable,
.disable = imx8mm_clk_disable,
.set_parent = imx8mm_clk_set_parent,
};
static int imx8mm_clk_probe(struct udevice *dev)
{
void __iomem *base;
@ -470,7 +384,7 @@ U_BOOT_DRIVER(imx8mm_clk) = {
.name = "clk_imx8mm",
.id = UCLASS_CLK,
.of_match = imx8mm_clk_ids,
.ops = &imx8mm_clk_ops,
.ops = &ccf_clk_ops,
.probe = imx8mm_clk_probe,
.flags = DM_FLAG_PRE_RELOC,
};

View File

@ -148,92 +148,6 @@ static const char * const imx8mn_usb_phy_sels[] = {"clock-osc-24m", "sys_pll1_10
"sys_pll2_100m", "sys_pll2_200m", "clk_ext2",
"clk_ext3", "audio_pll2_out", };
static ulong imx8mn_clk_get_rate(struct clk *clk)
{
struct clk *c;
int ret;
debug("%s(#%lu)\n", __func__, clk->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_get_rate(c);
}
static ulong imx8mn_clk_set_rate(struct clk *clk, unsigned long rate)
{
struct clk *c;
int ret;
debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_set_rate(c, rate);
}
static int __imx8mn_clk_enable(struct clk *clk, bool enable)
{
struct clk *c;
int ret;
debug("%s(#%lu) en: %d\n", __func__, clk->id, enable);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
if (enable)
ret = clk_enable(c);
else
ret = clk_disable(c);
return ret;
}
static int imx8mn_clk_disable(struct clk *clk)
{
return __imx8mn_clk_enable(clk, 0);
}
static int imx8mn_clk_enable(struct clk *clk)
{
return __imx8mn_clk_enable(clk, 1);
}
static int imx8mn_clk_set_parent(struct clk *clk, struct clk *parent)
{
struct clk *c, *cp;
int ret;
debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
ret = clk_get_by_id(parent->id, &cp);
if (ret)
return ret;
ret = clk_set_parent(c, cp);
c->dev->parent = cp->dev;
return ret;
}
static struct clk_ops imx8mn_clk_ops = {
.set_rate = imx8mn_clk_set_rate,
.get_rate = imx8mn_clk_get_rate,
.enable = imx8mn_clk_enable,
.disable = imx8mn_clk_disable,
.set_parent = imx8mn_clk_set_parent,
};
static int imx8mn_clk_probe(struct udevice *dev)
{
void __iomem *base;
@ -481,7 +395,7 @@ U_BOOT_DRIVER(imx8mn_clk) = {
.name = "clk_imx8mn",
.id = UCLASS_CLK,
.of_match = imx8mn_clk_ids,
.ops = &imx8mn_clk_ops,
.ops = &ccf_clk_ops,
.probe = imx8mn_clk_probe,
.flags = DM_FLAG_PRE_RELOC,
};

View File

@ -186,94 +186,6 @@ static const char *imx8mp_enet_phy_ref_sels[] = {"clock-osc-24m", "sys_pll2_50m"
static const char *imx8mp_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", };
static ulong imx8mp_clk_get_rate(struct clk *clk)
{
struct clk *c;
int ret;
debug("%s(#%lu)\n", __func__, clk->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_get_rate(c);
}
static ulong imx8mp_clk_set_rate(struct clk *clk, unsigned long rate)
{
struct clk *c;
int ret;
debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_set_rate(c, rate);
}
static int __imx8mp_clk_enable(struct clk *clk, bool enable)
{
struct clk *c;
int ret;
debug("%s(#%lu) en: %d\n", __func__, clk->id, enable);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
if (enable)
ret = clk_enable(c);
else
ret = clk_disable(c);
return ret;
}
static int imx8mp_clk_disable(struct clk *clk)
{
return __imx8mp_clk_enable(clk, 0);
}
static int imx8mp_clk_enable(struct clk *clk)
{
return __imx8mp_clk_enable(clk, 1);
}
static int imx8mp_clk_set_parent(struct clk *clk, struct clk *parent)
{
struct clk *c, *cp;
int ret;
debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
ret = clk_get_by_id(parent->id, &cp);
if (ret)
return ret;
ret = clk_set_parent(c, cp);
c->dev->parent = cp->dev;
return ret;
}
static struct clk_ops imx8mp_clk_ops = {
.set_rate = imx8mp_clk_set_rate,
.get_rate = imx8mp_clk_get_rate,
.enable = imx8mp_clk_enable,
.disable = imx8mp_clk_disable,
.set_parent = imx8mp_clk_set_parent,
};
static int imx8mp_clk_probe(struct udevice *dev)
{
void __iomem *base;
@ -409,7 +321,7 @@ U_BOOT_DRIVER(imx8mp_clk) = {
.name = "clk_imx8mp",
.id = UCLASS_CLK,
.of_match = imx8mp_clk_ids,
.ops = &imx8mp_clk_ops,
.ops = &ccf_clk_ops,
.probe = imx8mp_clk_probe,
.flags = DM_FLAG_PRE_RELOC,
};

View File

@ -14,68 +14,11 @@
#include "clk.h"
static ulong imxrt1020_clk_get_rate(struct clk *clk)
{
struct clk *c;
int ret;
debug("%s(#%lu)\n", __func__, clk->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_get_rate(c);
}
static ulong imxrt1020_clk_set_rate(struct clk *clk, unsigned long rate)
{
struct clk *c;
int ret;
debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_set_rate(c, rate);
}
static int __imxrt1020_clk_enable(struct clk *clk, bool enable)
{
struct clk *c;
int ret;
debug("%s(#%lu) en: %d\n", __func__, clk->id, enable);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
if (enable)
ret = clk_enable(c);
else
ret = clk_disable(c);
return ret;
}
static int imxrt1020_clk_disable(struct clk *clk)
{
return __imxrt1020_clk_enable(clk, 0);
}
static int imxrt1020_clk_enable(struct clk *clk)
{
return __imxrt1020_clk_enable(clk, 1);
}
static struct clk_ops imxrt1020_clk_ops = {
.set_rate = imxrt1020_clk_set_rate,
.get_rate = imxrt1020_clk_get_rate,
.enable = imxrt1020_clk_enable,
.disable = imxrt1020_clk_disable,
.set_rate = ccf_clk_set_rate,
.get_rate = ccf_clk_get_rate,
.enable = ccf_clk_enable,
.disable = ccf_clk_disable,
};
static const char * const pll2_bypass_sels[] = {"pll2_sys", "osc", };

View File

@ -15,89 +15,6 @@
#include "clk.h"
static ulong imxrt1050_clk_get_rate(struct clk *clk)
{
struct clk *c;
int ret;
debug("%s(#%lu)\n", __func__, clk->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_get_rate(c);
}
static ulong imxrt1050_clk_set_rate(struct clk *clk, ulong rate)
{
struct clk *c;
int ret;
debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_set_rate(c, rate);
}
static int __imxrt1050_clk_enable(struct clk *clk, bool enable)
{
struct clk *c;
int ret;
debug("%s(#%lu) en: %d\n", __func__, clk->id, enable);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
if (enable)
ret = clk_enable(c);
else
ret = clk_disable(c);
return ret;
}
static int imxrt1050_clk_disable(struct clk *clk)
{
return __imxrt1050_clk_enable(clk, 0);
}
static int imxrt1050_clk_enable(struct clk *clk)
{
return __imxrt1050_clk_enable(clk, 1);
}
static int imxrt1050_clk_set_parent(struct clk *clk, struct clk *parent)
{
struct clk *c, *cp;
int ret;
debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
ret = clk_get_by_id(parent->id, &cp);
if (ret)
return ret;
return clk_set_parent(c, cp);
}
static struct clk_ops imxrt1050_clk_ops = {
.set_rate = imxrt1050_clk_set_rate,
.get_rate = imxrt1050_clk_get_rate,
.enable = imxrt1050_clk_enable,
.disable = imxrt1050_clk_disable,
.set_parent = imxrt1050_clk_set_parent,
};
static const char * const pll_ref_sels[] = {"osc", "dummy", };
static const char * const pll1_bypass_sels[] = {"pll1_arm", "pll1_arm_ref_sel", };
static const char * const pll2_bypass_sels[] = {"pll2_sys", "pll2_sys_ref_sel", };
@ -317,7 +234,7 @@ U_BOOT_DRIVER(imxrt1050_clk) = {
.name = "clk_imxrt1050",
.id = UCLASS_CLK,
.of_match = imxrt1050_clk_ids,
.ops = &imxrt1050_clk_ops,
.ops = &ccf_clk_ops,
.probe = imxrt1050_clk_probe,
.flags = DM_FLAG_PRE_RELOC,
};

View File

@ -15,63 +15,6 @@
#include "mpfs_clk.h"
/* All methods are delegated to CCF clocks */
static ulong mpfs_clk_get_rate(struct clk *clk)
{
struct clk *c;
int err = clk_get_by_id(clk->id, &c);
if (err)
return err;
return clk_get_rate(c);
}
static ulong mpfs_clk_set_rate(struct clk *clk, unsigned long rate)
{
struct clk *c;
int err = clk_get_by_id(clk->id, &c);
if (err)
return err;
return clk_set_rate(c, rate);
}
static int mpfs_clk_set_parent(struct clk *clk, struct clk *parent)
{
struct clk *c, *p;
int err = clk_get_by_id(clk->id, &c);
if (err)
return err;
err = clk_get_by_id(parent->id, &p);
if (err)
return err;
return clk_set_parent(c, p);
}
static int mpfs_clk_endisable(struct clk *clk, bool enable)
{
struct clk *c;
int err = clk_get_by_id(clk->id, &c);
if (err)
return err;
return enable ? clk_enable(c) : clk_disable(c);
}
static int mpfs_clk_enable(struct clk *clk)
{
return mpfs_clk_endisable(clk, true);
}
static int mpfs_clk_disable(struct clk *clk)
{
return mpfs_clk_endisable(clk, false);
}
static int mpfs_clk_probe(struct udevice *dev)
{
int ret;
@ -100,14 +43,6 @@ static int mpfs_clk_probe(struct udevice *dev)
return ret;
}
static const struct clk_ops mpfs_clk_ops = {
.set_rate = mpfs_clk_set_rate,
.get_rate = mpfs_clk_get_rate,
.set_parent = mpfs_clk_set_parent,
.enable = mpfs_clk_enable,
.disable = mpfs_clk_disable,
};
static const struct udevice_id mpfs_of_match[] = {
{ .compatible = "microchip,mpfs-clkcfg" },
{ }
@ -117,7 +52,7 @@ U_BOOT_DRIVER(mpfs_clk) = {
.name = "mpfs_clk",
.id = UCLASS_CLK,
.of_match = mpfs_of_match,
.ops = &mpfs_clk_ops,
.ops = &ccf_clk_ops,
.probe = mpfs_clk_probe,
.priv_auto = sizeof(struct clk),
.flags = DM_FLAG_PRE_RELOC,

View File

@ -596,11 +596,7 @@ static int bcm6348_iudma_probe(struct udevice *dev)
return ret;
}
ret = clk_free(&clk);
if (ret < 0) {
pr_err("error freeing clock %d\n", i);
return ret;
}
clk_free(&clk);
}
/* try to perform resets */

View File

@ -461,11 +461,7 @@ static int bcm6348_eth_probe(struct udevice *dev)
return ret;
}
ret = clk_free(&clk);
if (ret < 0) {
pr_err("%s: error freeing clock %d\n", __func__, i);
return ret;
}
clk_free(&clk);
}
/* try to perform resets */

View File

@ -546,11 +546,7 @@ static int bcm6368_eth_probe(struct udevice *dev)
return ret;
}
ret = clk_free(&clk);
if (ret < 0) {
pr_err("%s: error freeing clock %d\n", __func__, i);
return ret;
}
clk_free(&clk);
}
/* try to perform resets */

View File

@ -98,9 +98,7 @@ static int bcm6318_usbh_probe(struct udevice *dev)
if (ret < 0)
return ret;
ret = clk_free(&clk);
if (ret < 0)
return ret;
clk_free(&clk);
/* enable power domain */
ret = power_domain_get(dev, &pwr_dom);

View File

@ -62,9 +62,7 @@ static int bcm6348_usbh_probe(struct udevice *dev)
if (ret < 0)
return ret;
ret = clk_free(&clk);
if (ret < 0)
return ret;
clk_free(&clk);
/* perform reset */
ret = reset_get_by_index(dev, 0, &rst_ctl);

View File

@ -137,9 +137,7 @@ static int bcm6368_usbh_probe(struct udevice *dev)
if (ret < 0)
return ret;
ret = clk_free(&clk);
if (ret < 0)
return ret;
clk_free(&clk);
#if defined(CONFIG_POWER_DOMAIN)
/* enable power domain */
@ -176,9 +174,7 @@ static int bcm6368_usbh_probe(struct udevice *dev)
if (ret < 0)
return ret;
ret = clk_free(&clk);
if (ret < 0)
return ret;
clk_free(&clk);
}
mdelay(100);

View File

@ -355,9 +355,7 @@ static int bcm63xx_hsspi_probe(struct udevice *dev)
if (ret < 0 && ret != -ENOSYS)
return ret;
ret = clk_free(&clk);
if (ret < 0 && ret != -ENOSYS)
return ret;
clk_free(&clk);
/* get clock rate */
ret = clk_get_by_name(dev, "pll", &clk);
@ -366,9 +364,7 @@ static int bcm63xx_hsspi_probe(struct udevice *dev)
priv->clk_rate = clk_get_rate(&clk);
ret = clk_free(&clk);
if (ret < 0 && ret != -ENOSYS)
return ret;
clk_free(&clk);
/* perform reset */
ret = reset_get_by_index(dev, 0, &rst_ctl);

View File

@ -391,9 +391,7 @@ static int bcm63xx_spi_probe(struct udevice *dev)
if (ret < 0)
return ret;
ret = clk_free(&clk);
if (ret < 0)
return ret;
clk_free(&clk);
/* perform reset */
ret = reset_get_by_index(dev, 0, &rst_ctl);

View File

@ -732,7 +732,7 @@ static int dw_spi_remove(struct udevice *bus)
if (ret)
return ret;
ret = clk_free(&priv->clk);
clk_free(&priv->clk);
if (ret)
return ret;
#endif

View File

@ -32,7 +32,7 @@ struct clk_ops {
int (*of_xlate)(struct clk *clock,
struct ofnode_phandle_args *args);
int (*request)(struct clk *clock);
int (*rfree)(struct clk *clock);
void (*rfree)(struct clk *clock);
ulong (*round_rate)(struct clk *clk, ulong rate);
ulong (*get_rate)(struct clk *clk);
ulong (*set_rate)(struct clk *clk, ulong rate);
@ -81,11 +81,9 @@ int request(struct clk *clock);
* rfree() - Free a previously requested clock.
* @clock: The clock to free.
*
* This is the implementation of the client clk_free() API.
*
* Return: 0 if OK, or a negative error code.
* Free any resources allocated in request().
*/
int rfree(struct clk *clock);
void rfree(struct clk *clock);
/**
* round_rate() - Adjust a rate to the exact rate a clock can provide.

View File

@ -414,9 +414,9 @@ int clk_request(struct udevice *dev, struct clk *clk);
* @clk: A clock struct that was previously successfully requested by
* clk_request/get_by_*().
*
* Return: 0 if OK, or a negative error code.
* Free resources allocated by clk_request() (or any clk_get_* function).
*/
int clk_free(struct clk *clk);
void clk_free(struct clk *clk);
/**
* clk_get_rate() - Get current clock rate.
@ -562,9 +562,9 @@ static inline int clk_request(struct udevice *dev, struct clk *clk)
return -ENOSYS;
}
static inline int clk_free(struct clk *clk)
static inline void clk_free(struct clk *clk)
{
return 0;
return;
}
static inline ulong clk_get_rate(struct clk *clk)

View File

@ -254,4 +254,12 @@ const char *clk_hw_get_name(const struct clk *hw);
ulong clk_generic_get_rate(struct clk *clk);
struct clk *dev_get_clk_ptr(struct udevice *dev);
ulong ccf_clk_get_rate(struct clk *clk);
ulong ccf_clk_set_rate(struct clk *clk, unsigned long rate);
int ccf_clk_set_parent(struct clk *clk, struct clk *parent);
int ccf_clk_enable(struct clk *clk);
int ccf_clk_disable(struct clk *clk);
extern const struct clk_ops ccf_clk_ops;
#endif /* __LINUX_CLK_PROVIDER_H */

View File

@ -1319,7 +1319,6 @@ CONFIG_SYS_I2C_PINMUX_CLR
CONFIG_SYS_I2C_PINMUX_REG
CONFIG_SYS_I2C_PINMUX_SET
CONFIG_SYS_I2C_PXA
CONFIG_SYS_I2C_QIXIS_ADDR
CONFIG_SYS_I2C_RTC_ADDR
CONFIG_SYS_I2C_TCA642X_ADDR
CONFIG_SYS_I2C_TCA642X_BUS_NUM