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clk: Use generic CCF ops where possible

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This converts most CCF drivers to use generic ops. imx6q is the only
outlier, where we retain the existing functionality by moving the check to
request().

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Link: https://lore.kernel.org/r/20220320203446.740178-2-seanga2@gmail.com
[ fixed missing include for at91 ]
Signed-off-by: Sean Anderson <seanga2@gmail.com>
This commit is contained in:
Sean Anderson 2022-03-20 16:34:46 -04:00
parent 3a11b5ae65
commit 682e73d235
8 changed files with 22 additions and 591 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

57
drivers/clk/at91/pmc.c
View File

@ -7,6 +7,7 @@
#include <common.h>
#include <asm/io.h>
#include <clk-uclass.h>
#include <linux/clk-provider.h>
#include "pmc.h"
static int at91_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args)
@ -21,60 +22,12 @@ static int at91_clk_of_xlate(struct clk *clk, struct ofnode_phandle_args *args)
return 0;
}
static ulong at91_clk_get_rate(struct clk *clk)
{
struct clk *c;
int ret;
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_get_rate(c);
}
static ulong at91_clk_set_rate(struct clk *clk, ulong rate)
{
struct clk *c;
int ret;
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_set_rate(c, rate);
}
static int at91_clk_enable(struct clk *clk)
{
struct clk *c;
int ret;
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_enable(c);
}
static int at91_clk_disable(struct clk *clk)
{
struct clk *c;
int ret;
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_disable(c);
}
const struct clk_ops at91_clk_ops = {
.of_xlate = at91_clk_of_xlate,
.set_rate = at91_clk_set_rate,
.get_rate = at91_clk_get_rate,
.enable = at91_clk_enable,
.disable = at91_clk_disable,
.set_rate = ccf_clk_set_rate,
.get_rate = ccf_clk_get_rate,
.enable = ccf_clk_enable,
.disable = ccf_clk_disable,
};
/**

73
drivers/clk/imx/clk-imx6q.c
View File

@ -14,79 +14,22 @@
#include "clk.h"
static int imx6q_check_id(ulong id)
static int imx6q_clk_request(struct clk *clk)
{
if (id < IMX6QDL_CLK_DUMMY || id >= IMX6QDL_CLK_END) {
printf("%s: Invalid clk ID #%lu\n", __func__, id);
if (clk->id < IMX6QDL_CLK_DUMMY || clk->id >= IMX6QDL_CLK_END) {
printf("%s: Invalid clk ID #%lu\n", __func__, clk->id);
return -EINVAL;
}
return 0;
}
static ulong imx6q_clk_get_rate(struct clk *clk)
{
struct clk *c;
int ret;
debug("%s(#%lu)\n", __func__, clk->id);
ret = imx6q_check_id(clk->id);
if (ret)
return ret;
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_get_rate(c);
}
static ulong imx6q_clk_set_rate(struct clk *clk, unsigned long rate)
{
debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
return rate;
}
static int __imx6q_clk_enable(struct clk *clk, bool enable)
{
struct clk *c;
int ret = 0;
debug("%s(#%lu) en: %d\n", __func__, clk->id, enable);
ret = imx6q_check_id(clk->id);
if (ret)
return ret;
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
if (enable)
ret = clk_enable(c);
else
ret = clk_disable(c);
return ret;
}
static int imx6q_clk_disable(struct clk *clk)
{
return __imx6q_clk_enable(clk, 0);
}
static int imx6q_clk_enable(struct clk *clk)
{
return __imx6q_clk_enable(clk, 1);
}
static struct clk_ops imx6q_clk_ops = {
.set_rate = imx6q_clk_set_rate,
.get_rate = imx6q_clk_get_rate,
.enable = imx6q_clk_enable,
.disable = imx6q_clk_disable,
.request = imx6q_clk_request,
.set_rate = ccf_clk_set_rate,
.get_rate = ccf_clk_get_rate,
.enable = ccf_clk_enable,
.disable = ccf_clk_disable,
};
static const char *const usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", };

88
drivers/clk/imx/clk-imx8mm.c
View File

@ -140,92 +140,6 @@ static const char *imx8mm_ecspi2_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sy
static const char *imx8mm_ecspi3_sels[] = {"clock-osc-24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m",
"sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out", };
static ulong imx8mm_clk_get_rate(struct clk *clk)
{
struct clk *c;
int ret;
debug("%s(#%lu)\n", __func__, clk->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_get_rate(c);
}
static ulong imx8mm_clk_set_rate(struct clk *clk, unsigned long rate)
{
struct clk *c;
int ret;
debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_set_rate(c, rate);
}
static int __imx8mm_clk_enable(struct clk *clk, bool enable)
{
struct clk *c;
int ret;
debug("%s(#%lu) en: %d\n", __func__, clk->id, enable);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
if (enable)
ret = clk_enable(c);
else
ret = clk_disable(c);
return ret;
}
static int imx8mm_clk_disable(struct clk *clk)
{
return __imx8mm_clk_enable(clk, 0);
}
static int imx8mm_clk_enable(struct clk *clk)
{
return __imx8mm_clk_enable(clk, 1);
}
static int imx8mm_clk_set_parent(struct clk *clk, struct clk *parent)
{
struct clk *c, *cp;
int ret;
debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
ret = clk_get_by_id(parent->id, &cp);
if (ret)
return ret;
ret = clk_set_parent(c, cp);
c->dev->parent = cp->dev;
return ret;
}
static struct clk_ops imx8mm_clk_ops = {
.set_rate = imx8mm_clk_set_rate,
.get_rate = imx8mm_clk_get_rate,
.enable = imx8mm_clk_enable,
.disable = imx8mm_clk_disable,
.set_parent = imx8mm_clk_set_parent,
};
static int imx8mm_clk_probe(struct udevice *dev)
{
void __iomem *base;
@ -470,7 +384,7 @@ U_BOOT_DRIVER(imx8mm_clk) = {
.name = "clk_imx8mm",
.id = UCLASS_CLK,
.of_match = imx8mm_clk_ids,
.ops = &imx8mm_clk_ops,
.ops = &ccf_clk_ops,
.probe = imx8mm_clk_probe,
.flags = DM_FLAG_PRE_RELOC,
};

88
drivers/clk/imx/clk-imx8mn.c
View File

@ -148,92 +148,6 @@ static const char * const imx8mn_usb_phy_sels[] = {"clock-osc-24m", "sys_pll1_10
"sys_pll2_100m", "sys_pll2_200m", "clk_ext2",
"clk_ext3", "audio_pll2_out", };
static ulong imx8mn_clk_get_rate(struct clk *clk)
{
struct clk *c;
int ret;
debug("%s(#%lu)\n", __func__, clk->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_get_rate(c);
}
static ulong imx8mn_clk_set_rate(struct clk *clk, unsigned long rate)
{
struct clk *c;
int ret;
debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_set_rate(c, rate);
}
static int __imx8mn_clk_enable(struct clk *clk, bool enable)
{
struct clk *c;
int ret;
debug("%s(#%lu) en: %d\n", __func__, clk->id, enable);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
if (enable)
ret = clk_enable(c);
else
ret = clk_disable(c);
return ret;
}
static int imx8mn_clk_disable(struct clk *clk)
{
return __imx8mn_clk_enable(clk, 0);
}
static int imx8mn_clk_enable(struct clk *clk)
{
return __imx8mn_clk_enable(clk, 1);
}
static int imx8mn_clk_set_parent(struct clk *clk, struct clk *parent)
{
struct clk *c, *cp;
int ret;
debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
ret = clk_get_by_id(parent->id, &cp);
if (ret)
return ret;
ret = clk_set_parent(c, cp);
c->dev->parent = cp->dev;
return ret;
}
static struct clk_ops imx8mn_clk_ops = {
.set_rate = imx8mn_clk_set_rate,
.get_rate = imx8mn_clk_get_rate,
.enable = imx8mn_clk_enable,
.disable = imx8mn_clk_disable,
.set_parent = imx8mn_clk_set_parent,
};
static int imx8mn_clk_probe(struct udevice *dev)
{
void __iomem *base;
@ -481,7 +395,7 @@ U_BOOT_DRIVER(imx8mn_clk) = {
.name = "clk_imx8mn",
.id = UCLASS_CLK,
.of_match = imx8mn_clk_ids,
.ops = &imx8mn_clk_ops,
.ops = &ccf_clk_ops,
.probe = imx8mn_clk_probe,
.flags = DM_FLAG_PRE_RELOC,
};

90
drivers/clk/imx/clk-imx8mp.c
View File

@ -186,94 +186,6 @@ static const char *imx8mp_enet_phy_ref_sels[] = {"clock-osc-24m", "sys_pll2_50m"
static const char *imx8mp_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", };
static ulong imx8mp_clk_get_rate(struct clk *clk)
{
struct clk *c;
int ret;
debug("%s(#%lu)\n", __func__, clk->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_get_rate(c);
}
static ulong imx8mp_clk_set_rate(struct clk *clk, unsigned long rate)
{
struct clk *c;
int ret;
debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_set_rate(c, rate);
}
static int __imx8mp_clk_enable(struct clk *clk, bool enable)
{
struct clk *c;
int ret;
debug("%s(#%lu) en: %d\n", __func__, clk->id, enable);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
if (enable)
ret = clk_enable(c);
else
ret = clk_disable(c);
return ret;
}
static int imx8mp_clk_disable(struct clk *clk)
{
return __imx8mp_clk_enable(clk, 0);
}
static int imx8mp_clk_enable(struct clk *clk)
{
return __imx8mp_clk_enable(clk, 1);
}
static int imx8mp_clk_set_parent(struct clk *clk, struct clk *parent)
{
struct clk *c, *cp;
int ret;
debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
ret = clk_get_by_id(parent->id, &cp);
if (ret)
return ret;
ret = clk_set_parent(c, cp);
c->dev->parent = cp->dev;
return ret;
}
static struct clk_ops imx8mp_clk_ops = {
.set_rate = imx8mp_clk_set_rate,
.get_rate = imx8mp_clk_get_rate,
.enable = imx8mp_clk_enable,
.disable = imx8mp_clk_disable,
.set_parent = imx8mp_clk_set_parent,
};
static int imx8mp_clk_probe(struct udevice *dev)
{
void __iomem *base;
@ -409,7 +321,7 @@ U_BOOT_DRIVER(imx8mp_clk) = {
.name = "clk_imx8mp",
.id = UCLASS_CLK,
.of_match = imx8mp_clk_ids,
.ops = &imx8mp_clk_ops,
.ops = &ccf_clk_ops,
.probe = imx8mp_clk_probe,
.flags = DM_FLAG_PRE_RELOC,
};

65
drivers/clk/imx/clk-imxrt1020.c
View File

@ -14,68 +14,11 @@
#include "clk.h"
static ulong imxrt1020_clk_get_rate(struct clk *clk)
{
struct clk *c;
int ret;
debug("%s(#%lu)\n", __func__, clk->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_get_rate(c);
}
static ulong imxrt1020_clk_set_rate(struct clk *clk, unsigned long rate)
{
struct clk *c;
int ret;
debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_set_rate(c, rate);
}
static int __imxrt1020_clk_enable(struct clk *clk, bool enable)
{
struct clk *c;
int ret;
debug("%s(#%lu) en: %d\n", __func__, clk->id, enable);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
if (enable)
ret = clk_enable(c);
else
ret = clk_disable(c);
return ret;
}
static int imxrt1020_clk_disable(struct clk *clk)
{
return __imxrt1020_clk_enable(clk, 0);
}
static int imxrt1020_clk_enable(struct clk *clk)
{
return __imxrt1020_clk_enable(clk, 1);
}
static struct clk_ops imxrt1020_clk_ops = {
.set_rate = imxrt1020_clk_set_rate,
.get_rate = imxrt1020_clk_get_rate,
.enable = imxrt1020_clk_enable,
.disable = imxrt1020_clk_disable,
.set_rate = ccf_clk_set_rate,
.get_rate = ccf_clk_get_rate,
.enable = ccf_clk_enable,
.disable = ccf_clk_disable,
};
static const char * const pll2_bypass_sels[] = {"pll2_sys", "osc", };

85
drivers/clk/imx/clk-imxrt1050.c
View File

@ -15,89 +15,6 @@
#include "clk.h"
static ulong imxrt1050_clk_get_rate(struct clk *clk)
{
struct clk *c;
int ret;
debug("%s(#%lu)\n", __func__, clk->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_get_rate(c);
}
static ulong imxrt1050_clk_set_rate(struct clk *clk, ulong rate)
{
struct clk *c;
int ret;
debug("%s(#%lu), rate: %lu\n", __func__, clk->id, rate);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
return clk_set_rate(c, rate);
}
static int __imxrt1050_clk_enable(struct clk *clk, bool enable)
{
struct clk *c;
int ret;
debug("%s(#%lu) en: %d\n", __func__, clk->id, enable);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
if (enable)
ret = clk_enable(c);
else
ret = clk_disable(c);
return ret;
}
static int imxrt1050_clk_disable(struct clk *clk)
{
return __imxrt1050_clk_enable(clk, 0);
}
static int imxrt1050_clk_enable(struct clk *clk)
{
return __imxrt1050_clk_enable(clk, 1);
}
static int imxrt1050_clk_set_parent(struct clk *clk, struct clk *parent)
{
struct clk *c, *cp;
int ret;
debug("%s(#%lu), parent: %lu\n", __func__, clk->id, parent->id);
ret = clk_get_by_id(clk->id, &c);
if (ret)
return ret;
ret = clk_get_by_id(parent->id, &cp);
if (ret)
return ret;
return clk_set_parent(c, cp);
}
static struct clk_ops imxrt1050_clk_ops = {
.set_rate = imxrt1050_clk_set_rate,
.get_rate = imxrt1050_clk_get_rate,
.enable = imxrt1050_clk_enable,
.disable = imxrt1050_clk_disable,
.set_parent = imxrt1050_clk_set_parent,
};
static const char * const pll_ref_sels[] = {"osc", "dummy", };
static const char * const pll1_bypass_sels[] = {"pll1_arm", "pll1_arm_ref_sel", };
static const char * const pll2_bypass_sels[] = {"pll2_sys", "pll2_sys_ref_sel", };
@ -317,7 +234,7 @@ U_BOOT_DRIVER(imxrt1050_clk) = {
.name = "clk_imxrt1050",
.id = UCLASS_CLK,
.of_match = imxrt1050_clk_ids,
.ops = &imxrt1050_clk_ops,
.ops = &ccf_clk_ops,
.probe = imxrt1050_clk_probe,
.flags = DM_FLAG_PRE_RELOC,
};

67
drivers/clk/microchip/mpfs_clk.c
View File

@ -15,63 +15,6 @@
#include "mpfs_clk.h"
/* All methods are delegated to CCF clocks */
static ulong mpfs_clk_get_rate(struct clk *clk)
{
struct clk *c;
int err = clk_get_by_id(clk->id, &c);
if (err)
return err;
return clk_get_rate(c);
}
static ulong mpfs_clk_set_rate(struct clk *clk, unsigned long rate)
{
struct clk *c;
int err = clk_get_by_id(clk->id, &c);
if (err)
return err;
return clk_set_rate(c, rate);
}
static int mpfs_clk_set_parent(struct clk *clk, struct clk *parent)
{
struct clk *c, *p;
int err = clk_get_by_id(clk->id, &c);
if (err)
return err;
err = clk_get_by_id(parent->id, &p);
if (err)
return err;
return clk_set_parent(c, p);
}
static int mpfs_clk_endisable(struct clk *clk, bool enable)
{
struct clk *c;
int err = clk_get_by_id(clk->id, &c);
if (err)
return err;
return enable ? clk_enable(c) : clk_disable(c);
}
static int mpfs_clk_enable(struct clk *clk)
{
return mpfs_clk_endisable(clk, true);
}
static int mpfs_clk_disable(struct clk *clk)
{
return mpfs_clk_endisable(clk, false);
}
static int mpfs_clk_probe(struct udevice *dev)
{
int ret;
@ -100,14 +43,6 @@ static int mpfs_clk_probe(struct udevice *dev)
return ret;
}
static const struct clk_ops mpfs_clk_ops = {
.set_rate = mpfs_clk_set_rate,
.get_rate = mpfs_clk_get_rate,
.set_parent = mpfs_clk_set_parent,
.enable = mpfs_clk_enable,
.disable = mpfs_clk_disable,
};
static const struct udevice_id mpfs_of_match[] = {
{ .compatible = "microchip,mpfs-clkcfg" },
{ }
@ -117,7 +52,7 @@ U_BOOT_DRIVER(mpfs_clk) = {
.name = "mpfs_clk",
.id = UCLASS_CLK,
.of_match = mpfs_of_match,
.ops = &mpfs_clk_ops,
.ops = &ccf_clk_ops,
.probe = mpfs_clk_probe,
.priv_auto = sizeof(struct clk),
.flags = DM_FLAG_PRE_RELOC,