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ARM: dts: uniphier: add device nodes for System Control blocks

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These are mainly used for controlling clocks and resets.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This commit is contained in:
Masahiro Yamada 2016-02-02 21:11:34 +09:00
parent cc33609546
commit 233812a642
7 changed files with 36 additions and 0 deletions
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8
arch/arm/dts/uniphier-common32.dtsi
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@ -101,6 +101,14 @@
reg = <0x5f801000 0xe00>;
};
sysctrl: sysctrl@61840000 {
/* specify compatible in each SoC DTSI */
reg = <0x61840000 0x4000>;
#clock-cells = <1>;
clock-names = "ref";
clocks = <&refclk>;
};
nand: nand@68000000 {
compatible = "denali,denali-nand-dt";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;

4
arch/arm/dts/uniphier-ph1-ld4.dtsi
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@ -160,3 +160,7 @@
&pinctrl {
compatible = "socionext,ph1-ld4-pinctrl", "syscon";
};
&sysctrl {
compatible = "socionext,ph1-ld4-sysctrl";
};

4
arch/arm/dts/uniphier-ph1-pro4.dtsi
View File

@ -200,3 +200,7 @@
&pinctrl {
compatible = "socionext,ph1-pro4-pinctrl", "syscon";
};
&sysctrl {
compatible = "socionext,ph1-pro4-sysctrl";
};

4
arch/arm/dts/uniphier-ph1-pro5.dtsi
View File

@ -194,3 +194,7 @@
&pinctrl {
compatible = "socionext,ph1-pro5-pinctrl", "syscon";
};
&sysctrl {
compatible = "socionext,ph1-pro5-sysctrl";
};

8
arch/arm/dts/uniphier-ph1-sld3.dtsi
View File

@ -206,6 +206,14 @@
interrupts = <0 83 4>;
};
sysctrl: sysctrl@f1840000 {
compatible = "socionext,ph1-sld3-sysctrl";
reg = <0xf1840000 0x4000>;
#clock-cells = <1>;
clock-names = "ref";
clocks = <&refclk>;
};
nand: nand@f8000000 {
compatible = "denali,denali-nand-dt";
reg = <0xf8000000 0x20>, <0xf8100000 0x1000>;

4
arch/arm/dts/uniphier-ph1-sld8.dtsi
View File

@ -160,3 +160,7 @@
&pinctrl {
compatible = "socionext,ph1-sld8-pinctrl", "syscon";
};
&sysctrl {
compatible = "socionext,ph1-sld8-sysctrl";
};

4
arch/arm/dts/uniphier-proxstream2.dtsi
View File

@ -205,3 +205,7 @@
&pinctrl {
compatible = "socionext,proxstream2-pinctrl", "syscon";
};
&sysctrl {
compatible = "socionext,proxstream2-sysctrl";
};