udoo_neo: Add PFUZE300 PMIC support
UDOO Neo boards has a PFUZE300 connected to I2C1 bus. Tested on a UDOO Neo Full with "pmic PFUZE3000 dump" command. Signed-off-by: Breno Lima <breno.lima@nxp.com>
This commit is contained in:
Breno Lima
Stefano Babic
parent
894a4b4da7
commit
21729bcdbd
@ -19,10 +19,14 @@
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#include <fsl_esdhc.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/io.h>
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#include <asm/imx-common/mxc_i2c.h>
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#include <asm/arch/sys_proto.h>
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#include <spl.h>
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#include <linux/sizes.h>
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#include <common.h>
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#include <i2c.h>
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#include <power/pmic.h>
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#include <power/pfuze3000_pmic.h>
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DECLARE_GLOBAL_DATA_PTR;
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@ -41,6 +45,11 @@ enum {
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PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \
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PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
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PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
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PAD_CTL_ODE)
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#define WDOG_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm)
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@ -56,6 +65,136 @@ int dram_init(void)
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return 0;
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}
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#ifdef CONFIG_SYS_I2C_MXC
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#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
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/* I2C1 for PMIC */
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static struct i2c_pads_info i2c_pad_info1 = {
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.scl = {
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.i2c_mode = MX6_PAD_GPIO1_IO00__I2C1_SCL | PC,
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.gpio_mode = MX6_PAD_GPIO1_IO00__GPIO1_IO_0 | PC,
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.gp = IMX_GPIO_NR(1, 0),
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},
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.sda = {
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.i2c_mode = MX6_PAD_GPIO1_IO01__I2C1_SDA | PC,
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.gpio_mode = MX6_PAD_GPIO1_IO01__GPIO1_IO_1 | PC,
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.gp = IMX_GPIO_NR(1, 1),
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},
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};
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#endif
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#ifdef CONFIG_POWER
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int power_init_board(void)
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{
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struct pmic *p;
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int ret;
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unsigned int reg, rev_id;
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ret = power_pfuze3000_init(PFUZE3000_I2C_BUS);
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if (ret)
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return ret;
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p = pmic_get("PFUZE3000");
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ret = pmic_probe(p);
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if (ret)
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return ret;
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pmic_reg_read(p, PFUZE3000_DEVICEID, ®);
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pmic_reg_read(p, PFUZE3000_REVID, &rev_id);
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printf("PMIC: PFUZE3000 DEV_ID=0x%x REV_ID=0x%x\n", reg, rev_id);
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/* disable Low Power Mode during standby mode */
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pmic_reg_read(p, PFUZE3000_LDOGCTL, ®);
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reg |= 0x1;
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ret = pmic_reg_write(p, PFUZE3000_LDOGCTL, reg);
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if (ret)
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return ret;
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ret = pmic_reg_write(p, PFUZE3000_SW1AMODE, 0xc);
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if (ret)
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return ret;
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ret = pmic_reg_write(p, PFUZE3000_SW1BMODE, 0xc);
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if (ret)
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return ret;
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ret = pmic_reg_write(p, PFUZE3000_SW2MODE, 0xc);
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if (ret)
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return ret;
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ret = pmic_reg_write(p, PFUZE3000_SW3MODE, 0xc);
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if (ret)
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return ret;
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/* set SW1A standby voltage 0.975V */
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pmic_reg_read(p, PFUZE3000_SW1ASTBY, ®);
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reg &= ~0x3f;
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reg |= PFUZE3000_SW1AB_SETP(9750);
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ret = pmic_reg_write(p, PFUZE3000_SW1ASTBY, reg);
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if (ret)
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return ret;
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/* set SW1B standby voltage 0.975V */
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pmic_reg_read(p, PFUZE3000_SW1BSTBY, ®);
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reg &= ~0x3f;
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reg |= PFUZE3000_SW1AB_SETP(9750);
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ret = pmic_reg_write(p, PFUZE3000_SW1BSTBY, reg);
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if (ret)
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return ret;
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/* set SW1A/VDD_ARM_IN step ramp up time from 16us to 4us/25mV */
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pmic_reg_read(p, PFUZE3000_SW1ACONF, ®);
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reg &= ~0xc0;
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reg |= 0x40;
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ret = pmic_reg_write(p, PFUZE3000_SW1ACONF, reg);
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if (ret)
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return ret;
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/* set SW1B/VDD_SOC_IN step ramp up time from 16us to 4us/25mV */
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pmic_reg_read(p, PFUZE3000_SW1BCONF, ®);
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reg &= ~0xc0;
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reg |= 0x40;
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ret = pmic_reg_write(p, PFUZE3000_SW1BCONF, reg);
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if (ret)
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return ret;
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/* set VDD_ARM_IN to 1.350V */
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pmic_reg_read(p, PFUZE3000_SW1AVOLT, ®);
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reg &= ~0x3f;
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reg |= PFUZE3000_SW1AB_SETP(13500);
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ret = pmic_reg_write(p, PFUZE3000_SW1AVOLT, reg);
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if (ret)
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return ret;
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/* set VDD_SOC_IN to 1.350V */
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pmic_reg_read(p, PFUZE3000_SW1BVOLT, ®);
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reg &= ~0x3f;
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reg |= PFUZE3000_SW1AB_SETP(13500);
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ret = pmic_reg_write(p, PFUZE3000_SW1BVOLT, reg);
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if (ret)
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return ret;
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/* set DDR_1_5V to 1.350V */
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pmic_reg_read(p, PFUZE3000_SW3VOLT, ®);
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reg &= ~0x0f;
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reg |= PFUZE3000_SW3_SETP(13500);
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ret = pmic_reg_write(p, PFUZE3000_SW3VOLT, reg);
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if (ret)
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return ret;
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/* set VGEN2_1V5 to 1.5V */
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pmic_reg_read(p, PFUZE3000_VLDO2CTL, ®);
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reg &= ~0x0f;
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reg |= PFUZE3000_VLDO_SETP(15000);
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/* enable */
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reg |= 0x10;
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ret = pmic_reg_write(p, PFUZE3000_VLDO2CTL, reg);
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if (ret)
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return ret;
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return 0;
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}
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#endif
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static iomux_v3_cfg_t const uart1_pads[] = {
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MX6_PAD_GPIO1_IO04__UART1_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
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MX6_PAD_GPIO1_IO05__UART1_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
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@ -115,6 +254,10 @@ int board_init(void)
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/* Active high for ncp692 */
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gpio_direction_output(IMX_GPIO_NR(4, 16) , 1);
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#ifdef CONFIG_SYS_I2C_MXC
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setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
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#endif
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return 0;
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}
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@ -90,4 +90,17 @@
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#define CONFIG_IMX_THERMAL
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/* I2C configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1
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#define CONFIG_SYS_I2C_SPEED 100000
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/* PMIC */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_PFUZE3000
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#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
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#define PFUZE3000_I2C_BUS 0
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#endif /* __CONFIG_H */
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