SPEAr: Configure FSMC driver for NAND interface

Since FSMC is a standard IP and it supports different memory interfaces, it
is supported independent of spear platform and spear is configured to use that
driver for interfacing with the NAND device

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
This commit is contained in:
Vipin KUMAR
2012-05-22 00:15:55 +00:00
committed by Albert ARIBAUD
parent 7f0730a02e
commit 1fa943b99d
8 changed files with 49 additions and 24 deletions

View File

@@ -88,9 +88,10 @@
#define CONFIG_SYS_LOADS_BAUD_CHANGE
/* NAND FLASH Configuration */
#define CONFIG_SYS_NAND_SELF_INIT
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#define CONFIG_NAND_SPEAR 1
#define CONFIG_NAND_FSMC
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_MTD_NAND_VERIFY_WRITE 1

View File

@@ -117,6 +117,10 @@
#endif
/* NAND flash configuration */
#define CONFIG_SYS_FSMC_NAND_SP
#define CONFIG_SYS_FSMC_NAND_8BIT
#if defined(CONFIG_SPEAR300)
#define CONFIG_SYS_NAND_BASE (0x80000000)

View File

@@ -38,6 +38,9 @@
#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, \
(void *)CONFIG_SYS_SERIAL1 }
/* NAND flash configuration */
#define CONFIG_SYS_FSMC_NAND_SP
#define CONFIG_SYS_FSMC_NAND_8BIT
#define CONFIG_SYS_NAND_BASE (0xD2000000)
#endif /* __CONFIG_H */