SPEAr: Configure FSMC driver for NAND interface
Since FSMC is a standard IP and it supports different memory interfaces, it is supported independent of spear platform and spear is configured to use that driver for interfacing with the NAND device Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
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@ -37,15 +37,15 @@
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#if defined(CONFIG_SPEAR600)
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#define CONFIG_SYS_I2C_BASE (0xD0200000)
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#define CONFIG_SPEAR_FSMCBASE (0xD1800000)
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#define CONFIG_SYS_FSMC_BASE (0xD1800000)
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#elif defined(CONFIG_SPEAR300)
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#define CONFIG_SYS_I2C_BASE (0xD0180000)
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#define CONFIG_SPEAR_FSMCBASE (0x94000000)
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#define CONFIG_SYS_FSMC_BASE (0x94000000)
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#elif defined(CONFIG_SPEAR310)
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#define CONFIG_SYS_I2C_BASE (0xD0180000)
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#define CONFIG_SPEAR_FSMCBASE (0x44000000)
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#define CONFIG_SYS_FSMC_BASE (0x44000000)
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#undef CONFIG_SYS_NAND_CLE
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#undef CONFIG_SYS_NAND_ALE
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@ -57,7 +57,7 @@
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#elif defined(CONFIG_SPEAR320)
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#define CONFIG_SYS_I2C_BASE (0xD0180000)
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#define CONFIG_SPEAR_FSMCBASE (0x4C000000)
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#define CONFIG_SYS_FSMC_BASE (0x4C000000)
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#define CONFIG_SPEAR_EMIBASE (0x40000000)
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#define CONFIG_SPEAR_RASBASE (0xB3000000)
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@ -24,10 +24,12 @@
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#include <common.h>
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#include <nand.h>
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#include <asm/io.h>
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#include <linux/mtd/fsmc_nand.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/spr_defs.h>
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#include <asm/arch/spr_misc.h>
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#include <asm/arch/spr_nand.h>
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static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
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int board_init(void)
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{
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@ -41,18 +43,20 @@ int board_init(void)
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* Called by nand_init_chip to initialize the board specific functions
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*/
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int board_nand_init(struct nand_chip *nand)
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void board_nand_init()
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{
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struct misc_regs *const misc_regs_p =
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(struct misc_regs *)CONFIG_SPEAR_MISCBASE;
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struct nand_chip *nand = &nand_chip[0];
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#if defined(CONFIG_NAND_FSMC)
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if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
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MISC_SOCCFG30) ||
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((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
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MISC_SOCCFG31)) {
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return spear_nand_init(nand);
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fsmc_nand_init(nand);
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}
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return -1;
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#endif
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return;
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}
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@ -25,10 +25,12 @@
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#include <common.h>
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#include <nand.h>
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#include <asm/io.h>
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#include <linux/mtd/fsmc_nand.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/spr_defs.h>
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#include <asm/arch/spr_misc.h>
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#include <asm/arch/spr_nand.h>
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static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
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int board_init(void)
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{
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@ -42,18 +44,20 @@ int board_init(void)
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* Called by nand_init_chip to initialize the board specific functions
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*/
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int board_nand_init(struct nand_chip *nand)
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void board_nand_init()
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{
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struct misc_regs *const misc_regs_p =
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(struct misc_regs *)CONFIG_SPEAR_MISCBASE;
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struct nand_chip *nand = &nand_chip[0];
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#if defined(CONFIG_NAND_FSMC)
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if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
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MISC_SOCCFG30) ||
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((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
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MISC_SOCCFG31)) {
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return spear_nand_init(nand);
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fsmc_nand_init(nand);
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}
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return -1;
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#endif
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return;
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}
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@ -25,10 +25,12 @@
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#include <common.h>
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#include <nand.h>
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#include <asm/io.h>
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#include <linux/mtd/fsmc_nand.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/spr_defs.h>
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#include <asm/arch/spr_misc.h>
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#include <asm/arch/spr_nand.h>
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static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
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int board_init(void)
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{
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@ -42,18 +44,21 @@ int board_init(void)
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* Called by nand_init_chip to initialize the board specific functions
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*/
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int board_nand_init(struct nand_chip *nand)
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void board_nand_init()
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{
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struct misc_regs *const misc_regs_p =
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(struct misc_regs *)CONFIG_SPEAR_MISCBASE;
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struct nand_chip *nand = &nand_chip[0];
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#if defined(CONFIG_NAND_FSMC)
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if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
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MISC_SOCCFG30) ||
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((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
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MISC_SOCCFG31)) {
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return spear_nand_init(nand);
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fsmc_nand_init(nand);
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}
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#endif
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return -1;
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return;
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}
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@ -24,10 +24,12 @@
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#include <common.h>
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#include <nand.h>
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#include <asm/io.h>
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#include <linux/mtd/fsmc_nand.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/spr_defs.h>
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#include <asm/arch/spr_misc.h>
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#include <asm/arch/spr_nand.h>
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static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
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int board_init(void)
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{
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@ -41,13 +43,15 @@ int board_init(void)
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* Called by nand_init_chip to initialize the board specific functions
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*/
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int board_nand_init(struct nand_chip *nand)
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void board_nand_init()
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{
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struct misc_regs *const misc_regs_p =
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(struct misc_regs *)CONFIG_SPEAR_MISCBASE;
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struct nand_chip *nand = &nand_chip[0];
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#if defined(CONFIG_NAND_FSMC)
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if (!(readl(&misc_regs_p->auto_cfg_reg) & MISC_NANDDIS))
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return spear_nand_init(nand);
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return -1;
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fsmc_nand_init(nand);
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#endif
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return;
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}
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@ -88,9 +88,10 @@
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#define CONFIG_SYS_LOADS_BAUD_CHANGE
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/* NAND FLASH Configuration */
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#define CONFIG_SYS_NAND_SELF_INIT
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#define CONFIG_MTD_DEVICE
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_NAND_SPEAR 1
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#define CONFIG_NAND_FSMC
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_MTD_NAND_VERIFY_WRITE 1
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#endif
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/* NAND flash configuration */
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#define CONFIG_SYS_FSMC_NAND_SP
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#define CONFIG_SYS_FSMC_NAND_8BIT
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#if defined(CONFIG_SPEAR300)
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#define CONFIG_SYS_NAND_BASE (0x80000000)
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#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, \
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(void *)CONFIG_SYS_SERIAL1 }
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/* NAND flash configuration */
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#define CONFIG_SYS_FSMC_NAND_SP
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#define CONFIG_SYS_FSMC_NAND_8BIT
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#define CONFIG_SYS_NAND_BASE (0xD2000000)
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#endif /* __CONFIG_H */
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