rockchip: add support for rk3288 miniarm board
Miniarm is a rockchip rk3288 based development board, which has lots of interface such as HDMI, USB, micro-SD card, Audio etc. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
This commit is contained in:
parent
aff8795c01
commit
1c62d99952
@ -33,6 +33,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rk3288-rock2-square.dtb \
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rk3288-evb.dtb \
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rk3288-fennec.dtb \
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rk3288-miniarm.dtb \
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rk3288-popmetal.dtb \
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rk3036-sdk.dtb \
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rk3399-evb.dtb
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61
arch/arm/dts/rk3288-miniarm.dts
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61
arch/arm/dts/rk3288-miniarm.dts
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@ -0,0 +1,61 @@
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/*
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* (C) Copyright 2016 Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: GPL-2.0+ X11
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*/
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/dts-v1/;
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#include "rk3288-miniarm.dtsi"
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/ {
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model = "Miniarm-RK3288";
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compatible = "rockchip,rk3288-miniarm", "rockchip,rk3288";
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chosen {
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stdout-path = &uart2;
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};
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};
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&dmc {
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rockchip,num-channels = <2>;
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rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
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0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
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0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
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0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
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0x5 0x0>;
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rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
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0xa60 0x40 0x10 0x0>;
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/* Add a dummy value to cause of-platdata think this is bytes */
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rockchip,sdram-channel = /bits/ 8 <0x1 0xa 0x3 0x2 0x1 0x0 0xf 0xf 0xff>;
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rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
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};
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&pinctrl {
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u-boot,dm-pre-reloc;
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};
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&pwm1 {
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status = "okay";
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};
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&uart2 {
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u-boot,dm-pre-reloc;
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reg-shift = <2>;
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};
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&sdmmc {
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u-boot,dm-pre-reloc;
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};
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&emmc {
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u-boot,dm-pre-reloc;
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};
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&gpio3 {
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u-boot,dm-pre-reloc;
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};
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&gpio8 {
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u-boot,dm-pre-reloc;
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};
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533
arch/arm/dts/rk3288-miniarm.dtsi
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533
arch/arm/dts/rk3288-miniarm.dtsi
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@ -0,0 +1,533 @@
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/*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "rk3288.dtsi"
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/ {
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memory {
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device_type = "memory";
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reg = <0x0 0x80000000>;
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};
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ext_gmac: external-gmac-clock {
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compatible = "fixed-clock";
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clock-frequency = <125000000>;
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clock-output-names = "ext_gmac";
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#clock-cells = <0>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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autorepeat;
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pinctrl-names = "default";
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pinctrl-0 = <&pwrbtn>;
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button@0 {
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gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
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label = "GPIO Key Power";
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linux,input-type = <1>;
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gpio-key,wakeup = <1>;
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debounce-interval = <100>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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pwr-led {
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gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "default-on";
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};
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act-led {
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gpios=<&gpio2 3 GPIO_ACTIVE_LOW>;
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linux,default-trigger="mmc0";
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};
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};
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vcc_sys: vsys-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc_sys";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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/*
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* NOTE: vcc_sd isn't hooked up on v1.0 boards where power comes from
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* vcc_io directly. Those boards won't be able to power cycle SD cards
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* but it shouldn't hurt to toggle this pin there anyway.
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*/
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vcc_sd: sdmmc-regulator {
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compatible = "regulator-fixed";
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gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_pwr>;
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regulator-name = "vcc_sd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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startup-delay-us = <100000>;
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vin-supply = <&vcc_io>;
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};
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};
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&cpu0 {
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cpu0-supply = <&vdd_cpu>;
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};
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&emmc {
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broken-cd;
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bus-width = <8>;
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cap-mmc-highspeed;
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disable-wp;
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non-removable;
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num-slots = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
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status = "okay";
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};
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&sdmmc {
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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card-detect-delay = <200>;
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disable-wp; /* wp not hooked up */
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num-slots = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
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status = "okay";
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supports-sd;
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vmmc-supply = <&vcc_sd>;
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vqmmc-supply = <&vccio_sd>;
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};
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&gpu {
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mali-supply = <&vdd_gpu>;
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status = "okay";
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};
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&gmac {
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phy-supply = <&vcc33_lan>;
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phy-mode = "rgmii";
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clock_in_out = "input";
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snps,reset-gpio = <&gpio4 7 0>;
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snps,reset-active-low;
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snps,reset-delays-us = <0 10000 1000000>;
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assigned-clocks = <&cru SCLK_MAC>;
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assigned-clock-parents = <&ext_gmac>;
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pinctrl-names = "default";
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pinctrl-0 = <&rgmii_pins>;
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tx_delay = <0x30>;
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rx_delay = <0x10>;
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status = "ok";
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};
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&hdmi {
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ddc-i2c-bus = <&i2c5>;
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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clock-frequency = <400000>;
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rk808: pmic@1b {
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compatible = "rockchip,rk808";
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reg = <0x1b>;
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interrupt-parent = <&gpio0>;
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interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pmic_int &global_pwroff>;
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rockchip,system-power-controller;
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wakeup-source;
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#clock-cells = <1>;
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clock-output-names = "xin32k", "rk808-clkout2";
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vcc1-supply = <&vcc_sys>;
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vcc2-supply = <&vcc_sys>;
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vcc3-supply = <&vcc_sys>;
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vcc4-supply = <&vcc_sys>;
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vcc6-supply = <&vcc_sys>;
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vcc7-supply = <&vcc_sys>;
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vcc8-supply = <&vcc_18>;
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vcc9-supply = <&vcc_io>;
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vcc10-supply = <&vcc_io>;
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vcc11-supply = <&vcc_sys>;
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vcc12-supply = <&vcc_io>;
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vddio-supply = <&vcc18_ldo1>;
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regulators {
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vdd_cpu: DCDC_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <1350000>;
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regulator-name = "vdd_arm";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_gpu: DCDC_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <1250000>;
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regulator-name = "vdd_gpu";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1000000>;
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};
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};
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vcc_ddr: DCDC_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc_ddr";
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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vcc_io: DCDC_REG4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc_io";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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vcc18_ldo1: LDO_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc18_ldo1";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vcc33_mipi: LDO_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc33_mipi";
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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vdd_10: LDO_REG3 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-name = "vdd_10";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1000000>;
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};
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};
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vcc18_codec: LDO_REG4 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc18_codec";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vccio_sd: LDO_REG5 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vccio_sd";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <3300000>;
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};
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};
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vdd10_lcd: LDO_REG6 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1000000>;
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regulator-max-microvolt = <1000000>;
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regulator-name = "vdd10_lcd";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1000000>;
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};
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};
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vcc_18: LDO_REG7 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc_18";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vcc18_lcd: LDO_REG8 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-name = "vcc18_lcd";
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regulator-state-mem {
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regulator-on-in-suspend;
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regulator-suspend-microvolt = <1800000>;
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};
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};
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vcc33_sd: SWITCH_REG1 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc33_sd";
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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vcc33_lan: SWITCH_REG2 {
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regulator-always-on;
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regulator-boot-on;
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regulator-name = "vcc33_lan";
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regulator-state-mem {
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regulator-on-in-suspend;
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};
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};
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};
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};
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};
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&i2c2 {
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status = "okay";
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headset: nau8825@1a {
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compatible = "nuvoton,nau8825";
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#sound-dai-cells = <0>;
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reg = <0x1a>;
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interrupt-parent = <&gpio6>;
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interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
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nuvoton,jkdet-enable = <1>;
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nuvoton,jkdet-pull-enable = <1>;
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nuvoton,jkdet-pull-up = <0>;
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nuvoton,jkdet-polarity = <1>;
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nuvoton,vref-impedance = <2>;
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nuvoton,micbias-voltage = <6>;
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nuvoton,sar-threshold-num = <4>;
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nuvoton,sar-threshold = <0xa 0x14 0x26 0x73>;
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nuvoton,sar-hysteresis = <0>;
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nuvoton,sar-voltage = <6>;
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nuvoton,sar-compare-time = <0>;
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nuvoton,sar-sampling-time = <0>;
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nuvoton,short-key-debounce = <3>;
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nuvoton,jack-insert-debounce = <7>;
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nuvoton,jack-eject-debounce = <7>;
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clock-names = "mclk";
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clocks = <&cru SCLK_I2S0_OUT>;
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};
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};
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&i2c5 {
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status = "okay";
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};
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&wdt {
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status = "okay";
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};
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&pwm0 {
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status = "okay";
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};
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&saradc {
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vref-supply = <&vcc18_ldo1>;
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status ="okay";
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};
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|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&tsadc {
|
||||
rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
|
||||
rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbphy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_otg {
|
||||
status= "okay";
|
||||
};
|
||||
|
||||
&vopb {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vopb_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vopl {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vopl_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
|
||||
drive-strength = <8>;
|
||||
};
|
||||
|
||||
pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
|
||||
bias-pull-up;
|
||||
drive-strength = <8>;
|
||||
};
|
||||
|
||||
backlight {
|
||||
bl_en: bl-en {
|
||||
rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
buttons {
|
||||
pwrbtn: pwrbtn {
|
||||
rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
eth_phy {
|
||||
eth_phy_pwr: eth-phy-pwr {
|
||||
rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
pmic {
|
||||
pmic_int: pmic-int {
|
||||
rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
sdmmc {
|
||||
/*
|
||||
* Default drive strength isn't enough to achieve even
|
||||
* high-speed mode on EVB board so bump up to 8ma.
|
||||
*/
|
||||
sdmmc_bus4: sdmmc-bus4 {
|
||||
rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
|
||||
<6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
|
||||
<6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
|
||||
<6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
|
||||
};
|
||||
|
||||
sdmmc_clk: sdmmc-clk {
|
||||
rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
|
||||
};
|
||||
|
||||
sdmmc_cmd: sdmmc-cmd {
|
||||
rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
|
||||
};
|
||||
|
||||
sdmmc_pwr: sdmmc-pwr {
|
||||
rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
usb {
|
||||
host_vbus_drv: host-vbus-drv {
|
||||
rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
pwr_3g: pwr-3g {
|
||||
rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
@ -33,6 +33,14 @@ config TARGET_POPMETAL_RK3288
|
||||
2GB DDR3. Expansion connectors provide access to I2C, SPI, UART,
|
||||
GPIOs and display interface.
|
||||
|
||||
config TARGET_MINIARM_RK3288
|
||||
bool "miniarm-RK3288"
|
||||
help
|
||||
Miniarm is a RK3288-based development board with 2 USB ports, HDMI,
|
||||
micro-SD card, audio, Gigabit Ethernet. It also includes on-board
|
||||
8GB eMMC and 2GB of SDRAM. Expansion connectors provide access to
|
||||
I2C, SPI, UART, GPIOs.
|
||||
|
||||
config TARGET_CHROMEBOOK_JERRY
|
||||
bool "Google/Rockchip Veyron-Jerry Chromebook"
|
||||
help
|
||||
@ -64,16 +72,18 @@ config SYS_SOC
|
||||
config SYS_MALLOC_F_LEN
|
||||
default 0x0800
|
||||
|
||||
source "board/google/chromebook_jerry/Kconfig"
|
||||
source "board/chipspark/popmetal_rk3288/Kconfig"
|
||||
|
||||
source "board/firefly/firefly-rk3288/Kconfig"
|
||||
|
||||
source "board/google/chromebook_jerry/Kconfig"
|
||||
|
||||
source "board/radxa/rock2/Kconfig"
|
||||
|
||||
source "board/rockchip/evb_rk3288/Kconfig"
|
||||
|
||||
source "board/rockchip/fennec_rk3288/Kconfig"
|
||||
|
||||
source "board/chipspark/popmetal_rk3288/Kconfig"
|
||||
source "board/rockchip/miniarm_rk3288/Kconfig"
|
||||
|
||||
endif
|
||||
|
15
board/rockchip/miniarm_rk3288/Kconfig
Normal file
15
board/rockchip/miniarm_rk3288/Kconfig
Normal file
@ -0,0 +1,15 @@
|
||||
if TARGET_MINIARM_RK3288
|
||||
|
||||
config SYS_BOARD
|
||||
default "miniarm_rk3288"
|
||||
|
||||
config SYS_VENDOR
|
||||
default "rockchip"
|
||||
|
||||
config SYS_CONFIG_NAME
|
||||
default "miniarm_rk3288"
|
||||
|
||||
config BOARD_SPECIFIC_OPTIONS # dummy
|
||||
def_bool y
|
||||
|
||||
endif
|
6
board/rockchip/miniarm_rk3288/MAINTAINERS
Normal file
6
board/rockchip/miniarm_rk3288/MAINTAINERS
Normal file
@ -0,0 +1,6 @@
|
||||
MINIARM-RK3288
|
||||
M: Lin Huang <hl@rock-chips.com>
|
||||
S: Maintained
|
||||
F: board/rockchip/miniarm_rk3288
|
||||
F: include/configs/miniarm_rk3288.h
|
||||
F: configs/miniarm-rk3288_defconfig
|
7
board/rockchip/miniarm_rk3288/Makefile
Normal file
7
board/rockchip/miniarm_rk3288/Makefile
Normal file
@ -0,0 +1,7 @@
|
||||
#
|
||||
# (C) Copyright 2016 Rockchip Electronics Co., Ltd
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
obj-y += miniarm-rk3288.o
|
15
board/rockchip/miniarm_rk3288/miniarm-rk3288.c
Normal file
15
board/rockchip/miniarm_rk3288/miniarm-rk3288.c
Normal file
@ -0,0 +1,15 @@
|
||||
/*
|
||||
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <spl.h>
|
||||
|
||||
void board_boot_order(u32 *spl_boot_list)
|
||||
{
|
||||
/* eMMC prior to sdcard */
|
||||
spl_boot_list[0] = BOOT_DEVICE_MMC2;
|
||||
spl_boot_list[1] = BOOT_DEVICE_MMC1;
|
||||
}
|
65
configs/miniarm-rk3288_defconfig
Normal file
65
configs/miniarm-rk3288_defconfig
Normal file
@ -0,0 +1,65 @@
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_ROCKCHIP=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x2000
|
||||
CONFIG_ROCKCHIP_RK3288=y
|
||||
CONFIG_TARGET_MINIARM_RK3288=y
|
||||
CONFIG_SPL_STACK_R_ADDR=0x80000
|
||||
CONFIG_DEFAULT_DEVICE_TREE="rk3288-miniarm"
|
||||
CONFIG_SPL_STACK_R=y
|
||||
CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
# CONFIG_CMD_IMLS is not set
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_SF=y
|
||||
CONFIG_CMD_SPI=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_GPIO=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_CMD_CACHE=y
|
||||
CONFIG_CMD_TIME=y
|
||||
CONFIG_CMD_PMIC=y
|
||||
CONFIG_CMD_REGULATOR=y
|
||||
CONFIG_CMD_EXT2=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_FS_GENERIC=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_SPL_SYSCON=y
|
||||
# CONFIG_SPL_SIMPLE_BUS is not set
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_ROCKCHIP_GPIO=y
|
||||
CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_ROCKCHIP_DWMMC=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
# CONFIG_SPL_PINCTRL_FULL is not set
|
||||
CONFIG_ROCKCHIP_RK3288_PINCTRL=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_PMIC_RK808=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_REGULATOR_RK808=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
CONFIG_DM_PWM=y
|
||||
CONFIG_PWM_ROCKCHIP=y
|
||||
CONFIG_RAM=y
|
||||
CONFIG_SPL_RAM=y
|
||||
CONFIG_DEBUG_UART=y
|
||||
CONFIG_DEBUG_UART_BASE=0xff690000
|
||||
CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
CONFIG_DEBUG_UART_SHIFT=2
|
||||
CONFIG_SYS_NS16550=y
|
||||
CONFIG_USE_PRIVATE_LIBGCC=y
|
||||
CONFIG_USE_TINY_PRINTF=y
|
||||
CONFIG_CMD_DHRYSTONE=y
|
||||
CONFIG_ERRNO_STR=y
|
@ -36,14 +36,15 @@ You will need:
|
||||
Building
|
||||
========
|
||||
|
||||
At present six RK3288 boards are supported:
|
||||
At present seven RK3288 boards are supported:
|
||||
|
||||
- Firefly RK3288 - use firefly-rk3288 configuration
|
||||
- Radxa Rock 2 - use rock2 configuration
|
||||
- Hisense Chromebook - use chromebook_jerry configuration
|
||||
- EVB RK3288 - use evb-rk3288 configuration
|
||||
- Fennec RK3288 - use fennec-rk3288 configuration
|
||||
- Firefly RK3288 - use firefly-rk3288 configuration
|
||||
- Hisense Chromebook - use chromebook_jerry configuration
|
||||
- Miniarm RK3288 - use miniarm-rk3288 configuration
|
||||
- PopMetal RK3288 - use popmetal-rk3288 configuration
|
||||
- Radxa Rock 2 - use rock2 configuration
|
||||
|
||||
Two RK3036 board are supported:
|
||||
|
||||
|
26
include/configs/miniarm_rk3288.h
Normal file
26
include/configs/miniarm_rk3288.h
Normal file
@ -0,0 +1,26 @@
|
||||
/*
|
||||
* (C) Copyright 2016 Rockchip Electronics Co., Ltd
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#define ROCKCHIP_DEVICE_SETTINGS
|
||||
#include <configs/rk3288_common.h>
|
||||
|
||||
#define CONFIG_SPL_MMC_SUPPORT
|
||||
|
||||
#define CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 1
|
||||
/* SPL @ 32k for ~36k
|
||||
* ENV @ 96k
|
||||
* u-boot @ 128K
|
||||
*/
|
||||
#define CONFIG_ENV_OFFSET (96 * 1024)
|
||||
|
||||
#define CONFIG_SYS_WHITE_ON_BLACK
|
||||
#define CONFIG_CONSOLE_SCROLL_LINES 10
|
||||
|
||||
#endif
|
Loading…
Reference in New Issue
Block a user