arm/dts/ls2085a: Add dts files for LS2085AQDS and LS2085ARDB
Add dts source files for LS2085AQDS and LS2085ARDB boards. Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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@ -57,6 +57,8 @@ dtb-$(CONFIG_TARGET_STV0991) += stv0991.dtb
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dtb-$(CONFIG_LS102XA) += ls1021a-qds.dtb \
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ls1021a-twr.dtb
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dtb-$(CONFIG_FSL_LSCH3) += fsl-ls2085a-qds.dtb \
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fsl-ls2085a-rdb.dtb
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dtb-$(CONFIG_MACH_SUN4I) += \
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sun4i-a10-a1000.dtb \
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53
arch/arm/dts/fsl-ls2085a-qds.dts
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53
arch/arm/dts/fsl-ls2085a-qds.dts
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@ -0,0 +1,53 @@
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/*
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* Freescale ls2085a QDS board device tree source
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*
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* Copyright 2013-2015 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/dts-v1/;
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#include "fsl-ls2085a.dtsi"
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/ {
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model = "Freescale Layerscape 2085a QDS Board";
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compatible = "fsl,ls2085a-qds", "fsl,ls2085a";
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aliases {
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spi1 = &dspi;
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};
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};
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&dspi {
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bus-num = <0>;
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status = "okay";
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dflash0: n25q128a {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3000000>;
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spi-cpol;
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spi-cpha;
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reg = <0>;
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};
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dflash1: sst25wf040b {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3000000>;
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spi-cpol;
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spi-cpha;
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reg = <1>;
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};
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dflash2: en25s64 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3000000>;
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spi-cpol;
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spi-cpha;
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reg = <2>;
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};
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};
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35
arch/arm/dts/fsl-ls2085a-rdb.dts
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35
arch/arm/dts/fsl-ls2085a-rdb.dts
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@ -0,0 +1,35 @@
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/*
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* Freescale ls2085a RDB board device tree source
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*
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* Copyright 2013-2015 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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/dts-v1/;
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#include "fsl-ls2085a.dtsi"
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/ {
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model = "Freescale Layerscape 2085a RDB Board";
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compatible = "fsl,ls2085a-rdb", "fsl,ls2085a";
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aliases {
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spi1 = &dspi;
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};
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};
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&dspi {
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bus-num = <0>;
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status = "okay";
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dflash0: n25q512a {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3000000>;
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spi-cpol;
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spi-cpha;
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reg = <0>;
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};
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};
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