mmc: sdhci: Enable 8-bit bus width only for 3.0 spec onwards
CAP register don't have any information for 8-bit buswidth support
on 2.0 sdhci spec, only from 3.0 onwards bit[18] got this information.
Due to this misassignment in sdhci, mmc is setting 8-bit buswidth using
mmc_set_bus_width even if controller doesn't support.
Below change has code information.
"mmc: Properly determine maximum supported bus width"
(sha1: 7798f6dbd5
)
Bug log: <mmc plus and emmc cards)
-------
zynq-uboot> mmcinfo
Error detected in status(0x208100)!
Device: zynq_sdhci
Manufacturer ID: fe
.....
So enable 8-bit support only for 3.0 spec using CAP and for below 3.0
assign mmc->host_caps = MMC_MODE_8BIT on respective platform driver
if host have a support.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This commit is contained in:
parent
5707df7796
commit
1695b29a5d
@ -486,8 +486,10 @@ int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk)
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mmc->voltages |= host->voltages;
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mmc->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT;
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if (caps & SDHCI_CAN_DO_8BIT)
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mmc->host_caps |= MMC_MODE_8BIT;
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if ((host->version & SDHCI_SPEC_VER_MASK) >= SDHCI_SPEC_300) {
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if (caps & SDHCI_CAN_DO_8BIT)
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mmc->host_caps |= MMC_MODE_8BIT;
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}
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if (host->host_caps)
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mmc->host_caps |= host->host_caps;
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