ehci-mxc: Clean up
Clean up ehci-mxc: - Remove useless #if's. - Fix identation. - Issue a #error if used with an unsupported platform. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
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@ -28,14 +28,11 @@
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#define USBCTRL_OTGBASE_OFFSET 0x600
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#ifdef CONFIG_MX25
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#define MX25_USB_CTRL_IP_PUE_DOWN_BIT (1<<6)
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#define MX25_USB_CTRL_HSTD_BIT (1<<5)
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#define MX25_USB_CTRL_USBTE_BIT (1<<4)
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#define MX25_USB_CTRL_OCPOL_OTG_BIT (1<<3)
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#endif
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#ifdef CONFIG_MX31
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#define MX31_OTG_SIC_SHIFT 29
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#define MX31_OTG_SIC_MASK (0x3 << MX31_OTG_SIC_SHIFT)
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#define MX31_OTG_PM_BIT (1 << 24)
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@ -49,59 +46,56 @@
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#define MX31_H1_SIC_MASK (0x3 << MX31_H1_SIC_SHIFT)
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#define MX31_H1_PM_BIT (1 << 8)
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#define MX31_H1_DT_BIT (1 << 4)
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#endif
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static int mxc_set_usbcontrol(int port, unsigned int flags)
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{
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unsigned int v;
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#ifdef CONFIG_MX25
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#if defined(CONFIG_MX25)
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v = MX25_USB_CTRL_IP_PUE_DOWN_BIT | MX25_USB_CTRL_HSTD_BIT |
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MX25_USB_CTRL_USBTE_BIT | MX25_USB_CTRL_OCPOL_OTG_BIT;
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#elif defined(CONFIG_MX31)
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v = readl(IMX_USB_BASE + USBCTRL_OTGBASE_OFFSET);
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switch (port) {
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case 0: /* OTG port */
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v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
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v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_OTG_SIC_SHIFT;
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if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
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v |= MX31_OTG_PM_BIT;
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break;
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case 1: /* H1 port */
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v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT);
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v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H1_SIC_SHIFT;
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if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
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v |= MX31_H1_PM_BIT;
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if (!(flags & MXC_EHCI_TTL_ENABLED))
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v |= MX31_H1_DT_BIT;
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break;
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case 2: /* H2 port */
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v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT);
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v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H2_SIC_SHIFT;
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if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
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v |= MX31_H2_PM_BIT;
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if (!(flags & MXC_EHCI_TTL_ENABLED))
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v |= MX31_H2_DT_BIT;
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break;
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default:
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return -EINVAL;
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}
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#else
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#error MXC EHCI USB driver not supported on this platform
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#endif
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#ifdef CONFIG_MX31
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v = readl(IMX_USB_BASE + USBCTRL_OTGBASE_OFFSET);
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switch (port) {
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case 0: /* OTG port */
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v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
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v |= (flags & MXC_EHCI_INTERFACE_MASK)
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<< MX31_OTG_SIC_SHIFT;
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if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
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v |= MX31_OTG_PM_BIT;
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break;
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case 1: /* H1 port */
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v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT |
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MX31_H1_DT_BIT);
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v |= (flags & MXC_EHCI_INTERFACE_MASK)
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<< MX31_H1_SIC_SHIFT;
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if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
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v |= MX31_H1_PM_BIT;
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if (!(flags & MXC_EHCI_TTL_ENABLED))
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v |= MX31_H1_DT_BIT;
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break;
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case 2: /* H2 port */
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v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT |
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MX31_H2_DT_BIT);
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v |= (flags & MXC_EHCI_INTERFACE_MASK)
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<< MX31_H2_SIC_SHIFT;
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if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
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v |= MX31_H2_PM_BIT;
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if (!(flags & MXC_EHCI_TTL_ENABLED))
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v |= MX31_H2_DT_BIT;
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break;
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default:
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return -EINVAL;
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}
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#endif
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writel(v, IMX_USB_BASE + USBCTRL_OTGBASE_OFFSET);
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return 0;
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}
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