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drivers/usb : Define usb control register mask for w1c bits

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Define and use CONTROL_REGISTER_W1C_MASK to make sure that
w1c bits of usb control register do not get reset while
writing any other bit

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This commit is contained in:
Nikhil Badola 2014-05-08 17:05:26 +05:30 committed by York Sun
parent 9c3fdd883a
commit 15231f6dd1
2 changed files with 12 additions and 5 deletions
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15
drivers/usb/host/ehci-fsl.c
View File

@ -104,15 +104,20 @@ int ehci_hcd_init(int index, enum usb_init_type init,
if (!strncmp(phy_type, "utmi", 4)) {
#if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY)
setbits_be32(&ehci->control, PHY_CLK_SEL_UTMI);
setbits_be32(&ehci->control, UTMI_PHY_EN);
clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
PHY_CLK_SEL_UTMI);
clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
UTMI_PHY_EN);
udelay(1000); /* delay required for PHY Clk to appear */
#endif
out_le32(&(*hcor)->or_portsc[0], PORT_PTS_UTMI);
setbits_be32(&ehci->control, USB_EN);
clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
USB_EN);
} else {
setbits_be32(&ehci->control, PHY_CLK_SEL_ULPI);
clrsetbits_be32(&ehci->control, UTMI_PHY_EN, USB_EN);
clrsetbits_be32(&ehci->control, CONTROL_REGISTER_W1C_MASK,
PHY_CLK_SEL_ULPI);
clrsetbits_be32(&ehci->control, UTMI_PHY_EN |
CONTROL_REGISTER_W1C_MASK, USB_EN);
udelay(1000); /* delay required for PHY Clk to appear */
if (!usb_phy_clk_valid(ehci))
return -EINVAL;

2
include/usb/ehci-fsl.h
View File

@ -11,6 +11,8 @@
#include <asm/processor.h>
#define CONTROL_REGISTER_W1C_MASK 0x00020000 /* W1C: PHY_CLK_VALID */
/* Global offsets */
#define FSL_SKIP_PCI 0x100