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Two fixes for the Amlogic Pinctrl driver :

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- bad usage of clrsetbits_le32
 - bad pin definition for AXG Family
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJcCkUAAAoJEHfc29rIyEnRqtAP/2BpLCNUqeZXzgaTueFbSp6z
 JYPL45POLunaZrlTHVCrYTymcqr+AuS1cPjEIZI49RgVepDs6EWR/NcLWexiFKZ8
 kdxSVP8FO6675sJ8KdYzGbgdBna5a2HPWZtYmX0OHGKgiPClL9HAkGrFWAwJtlHK
 2zAQ+zRPt4TTwEgkmKK2/38Jz7rgkIpeXWoSuu9UEGmfkMhNFLGOPbzzNxHJTL3n
 Ll7hLjLTBexgS6FQSHlNOj4XOnUubGTCchblCuMeVrEmUnvsgsXkzNMpRvfClzsZ
 YsFgRHikTZG56QoUKErGu1XeJweF1DPQsYuxRQf4YJBjAiGHw0ASNgMy1cFmSfUp
 rRCPDm4RHbSAvg/26iEU62FyFFLfrbtYuQJoxvp9iQbeamdXzFg/m8FyW4lNUeMU
 xO42XobtsmEahsSlxPB9akIJEWOLNLXFt/HHCqHJZYGRu5wDK5ZysTp2E2sHCYF8
 zttTi8WoPfiClmo8bLTIW/2SLylYILn48b9Gw6uZUq9B2uhsVeEro6Ya0d/fkFUd
 IbtqGmcG/ejsh6R4V1BEHr96KEcpgXAzzWTW0IPGZIyQ4VHq+bOhL/YPm5eX2WVW
 Wq/qMmhXuoJpZP/l/b3B4xRhQ5JWjWPtd8C2QBBTOX8uCSbmS0z+r6s0CTDzesD+
 ODiWDH021RxK7WiJV4kN
 =dvG1
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-amlogic-20181207' of git://git.denx.de/u-boot-amlogic

Two fixes for the Amlogic Pinctrl driver :
- bad usage of clrsetbits_le32
- bad pin definition for AXG Family
This commit is contained in:
Tom Rini 2018-12-07 19:01:09 -05:00
commit 10d3e90f46
2 changed files with 13 additions and 13 deletions
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22
drivers/pinctrl/meson/pinctrl-meson-axg.c
View File

@ -14,7 +14,7 @@
#include "pinctrl-meson-axg.h"
#define EE_OFF 14
#define EE_OFF 15
/* emmc */
static const unsigned int emmc_nand_d0_pins[] = {BOOT_0};
@ -893,17 +893,17 @@ static struct meson_pmx_func meson_axg_aobus_functions[] = {
};
static struct meson_bank meson_axg_periphs_banks[] = {
/* name first last pullen pull dir out in */
BANK("Z", GPIOZ_0, GPIOZ_10, 3, 0, 3, 0, 9, 0, 10, 0, 11, 0),
BANK("BOOT", BOOT_0, BOOT_14, 4, 0, 4, 0, 12, 0, 13, 0, 14, 0),
BANK("A", GPIOA_0, GPIOA_20, 0, 0, 0, 0, 0, 0, 1, 0, 2, 0),
BANK("X", GPIOX_0, GPIOX_22, 2, 0, 2, 0, 6, 0, 7, 0, 8, 0),
BANK("Y", GPIOY_0, GPIOY_15, 1, 0, 1, 0, 3, 0, 4, 0, 5, 0),
/* name first last pullen pull dir out in */
BANK("Z", PIN(GPIOZ_0, EE_OFF), PIN(GPIOZ_10, EE_OFF), 3, 0, 3, 0, 9, 0, 10, 0, 11, 0),
BANK("BOOT", PIN(BOOT_0, EE_OFF), PIN(BOOT_14, EE_OFF), 4, 0, 4, 0, 12, 0, 13, 0, 14, 0),
BANK("A", PIN(GPIOA_0, EE_OFF), PIN(GPIOA_20, EE_OFF), 0, 0, 0, 0, 0, 0, 1, 0, 2, 0),
BANK("X", PIN(GPIOX_0, EE_OFF), PIN(GPIOX_22, EE_OFF), 2, 0, 2, 0, 6, 0, 7, 0, 8, 0),
BANK("Y", PIN(GPIOY_0, EE_OFF), PIN(GPIOY_15, EE_OFF), 1, 0, 1, 0, 3, 0, 4, 0, 5, 0),
};
static struct meson_bank meson_axg_aobus_banks[] = {
/* name first last pullen pull dir out in */
BANK("AO", GPIOAO_0, GPIOAO_13, 0, 16, 0, 0, 0, 0, 0, 16, 1, 0),
/* name first last pullen pull dir out in */
BANK("AO", PIN(GPIOAO_0, 0), PIN(GPIOAO_13, 0), 0, 16, 0, 0, 0, 0, 0, 16, 1, 0),
};
static struct meson_pmx_bank meson_axg_periphs_pmx_banks[] = {
@ -931,11 +931,11 @@ static struct meson_axg_pmx_data meson_axg_aobus_pmx_banks_data = {
struct meson_pinctrl_data meson_axg_periphs_pinctrl_data = {
.name = "periphs-banks",
.pin_base = 11,
.pin_base = 15,
.groups = meson_axg_periphs_groups,
.funcs = meson_axg_periphs_functions,
.banks = meson_axg_periphs_banks,
.num_pins = 100,
.num_pins = 86,
.num_groups = ARRAY_SIZE(meson_axg_periphs_groups),
.num_funcs = ARRAY_SIZE(meson_axg_periphs_functions),
.num_banks = ARRAY_SIZE(meson_axg_periphs_banks),

4
drivers/pinctrl/meson/pinctrl-meson.c
View File

@ -136,7 +136,7 @@ int meson_gpio_direction_input(struct udevice *dev, unsigned int offset)
if (ret)
return ret;
clrsetbits_le32(priv->reg_gpio + reg, BIT(bit), 1);
setbits_le32(priv->reg_gpio + reg, BIT(bit));
return 0;
}
@ -152,7 +152,7 @@ int meson_gpio_direction_output(struct udevice *dev,
if (ret)
return ret;
clrsetbits_le32(priv->reg_gpio + reg, BIT(bit), 0);
clrbits_le32(priv->reg_gpio + reg, BIT(bit));
ret = meson_gpio_calc_reg_and_bit(dev, offset, REG_OUT, &reg, &bit);
if (ret)