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Exynos: Split 5250 and 5420 memory bank configuration

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Since snow has a different memory configuration than peach, split the
configuration between the 5250 and 5420. Exynos 5420 supports runtime
memory configuration detection, and can make the determination between 4
and 7 banks at runtime.

Include the bank size with the number of banks for context to make the
number of banks meaningful.

Signed-off-by: Michael Pratt <mpratt@chromium.org>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This commit is contained in:
Michael Pratt 2014-06-18 17:54:02 +05:30 committed by Minkyu Kang
parent 582693b273
commit 0cf7e18904
3 changed files with 9 additions and 2 deletions
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2
include/configs/exynos5-dt.h
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@ -161,8 +161,6 @@
#define CONFIG_RD_LVL
#define CONFIG_NR_DRAM_BANKS 8
#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)

5
include/configs/exynos5250-dt.h
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@ -65,4 +65,9 @@
#define LCD_YRES 1600
#define LCD_BPP LCD_COLOR16
#endif
/* DRAM Memory Banks */
#define CONFIG_NR_DRAM_BANKS 8
#define SDRAM_BANK_SIZE (256UL << 20UL) /* 256 MB */
#endif /* __CONFIG_5250_H */

4
include/configs/exynos5420.h
View File

@ -45,4 +45,8 @@
*/
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
/* DRAM Memory Banks */
#define CONFIG_NR_DRAM_BANKS 7
#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
#endif /* __CONFIG_EXYNOS5420_H */