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ARM: rmobile: Add Beacon EmbeddedWorks RZG2H Dev Kit

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The Beacon EmbeddedWorks kit is based on the R8A774E1 SoC also
known as the RZ/G2H.

The kit consists of a SOM + Baseboard and supports microSD,
eMMC, Ethernet, a couple celular radios, two CAN interfaces,
Bluetooth and WiFi.  It shares much of the same design as
the RZ/G2M and RZ/G2N dev kits.

Signed-off-by: Adam Ford <aford173@gmail.com>
This commit is contained in:
Adam Ford
2021-02-03 06:57:20 -06:00
committed by Marek Vasut
parent 6001b49920
commit 0099dfd5e5
7 changed files with 190 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/dts/Makefile
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@@ -810,6 +810,7 @@ dtb-$(CONFIG_RCAR_GEN2) += \
dtb-$(CONFIG_RCAR_GEN3) += \
r8a774a1-beacon-rzg2m-kit.dtb \
r8a774b1-beacon-rzg2n-kit.dtb \
r8a774e1-beacon-rzg2h-kit.dtb \
r8a77950-ulcb-u-boot.dtb \
r8a77950-salvator-x-u-boot.dtb \
r8a77960-ulcb-u-boot.dtb \

44
arch/arm/dts/r8a774e1-beacon-rzg2h-kit-u-boot.dtsi Normal file
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@@ -0,0 +1,44 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2020 Compass Electronics Group, LLC
*/
/ {
soc {
u-boot,dm-pre-reloc;
};
};
&cpg {
u-boot,dm-pre-reloc;
};
&extal_clk {
u-boot,dm-pre-reloc;
};
&prr {
u-boot,dm-pre-reloc;
};
&extalr_clk {
u-boot,dm-pre-reloc;
};
&sdhi0 {
/delete-property/ cd-gpios;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr104;
max-frequency = <208000000>;
};
&sdhi2 {
status = "disabled";
};
&sdhi3 {
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
};

71
arch/arm/dts/r8a774e1-beacon-rzg2h-kit.dts Normal file
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@@ -0,0 +1,71 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2020, Compass Electronics Group, LLC
*/
/dts-v1/;
#include "r8a774e1.dtsi"
#include "beacon-renesom-som.dtsi"
#include "beacon-renesom-baseboard.dtsi"
/ {
model = "Beacon Embedded Works RZ/G2H Development Kit";
compatible = "beacon,beacon-rzg2h", "renesas,r8a774e1";
aliases {
serial0 = &scif2;
serial1 = &hscif0;
serial2 = &hscif1;
serial3 = &scif0;
serial4 = &hscif2;
serial5 = &scif5;
serial6 = &scif4;
ethernet0 = &avb;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@500000000 {
device_type = "memory";
reg = <0x5 0x00000000 0x0 0x80000000>;
};
};
&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
status = "okay";
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 721>,
<&versaclock5 1>,
<&x302_clk>,
<&versaclock5 2>;
clock-names = "du.0", "du.1", "du.3",
"dclkin.0", "dclkin.1", "dclkin.3";
};
/* Reference versaclock instead of audio_clk_a */
&rcar_sound {
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&versaclock6_bb 4>, <&audio_clk_b>,
<&audio_clk_c>,
<&cpg CPG_CORE R8A774E1_CLK_S0D4>;
};

5
arch/arm/mach-rmobile/Kconfig.64
View File

@@ -60,6 +60,11 @@ choice
prompt "Renesas ARM64 SoCs board select"
optional
config TARGET_BEACON_RZG2H
bool "Beacon EmbeddedWorks RZ/G2H Dev Kit"
select R8A774E1
select PINCTRL_PFC_R8A774E1
config TARGET_BEACON_RZG2M
bool "Beacon EmbeddedWorks RZ/G2M Dev Kit"
select R8A774A1