2011-11-29 18:05:07 +00:00
|
|
|
/*
|
|
|
|
* Copyright (c) 2011 The Chromium OS Authors.
|
|
|
|
* (C) Copyright 2008
|
|
|
|
* Graeme Russ, graeme.russ@gmail.com.
|
|
|
|
*
|
2013-10-07 11:07:26 +00:00
|
|
|
* SPDX-License-Identifier: GPL-2.0+
|
2011-11-29 18:05:07 +00:00
|
|
|
*/
|
|
|
|
|
|
|
|
#include <common.h>
|
|
|
|
#include <netdev.h>
|
2012-12-03 13:58:12 +00:00
|
|
|
#include <asm/io.h>
|
2015-06-03 01:20:02 +00:00
|
|
|
#include <asm/msr.h>
|
2015-01-01 23:18:07 +00:00
|
|
|
#include <asm/mtrr.h>
|
2014-11-13 05:42:16 +00:00
|
|
|
#include <asm/arch/sysinfo.h>
|
2012-10-23 18:04:33 +00:00
|
|
|
#include <asm/arch/timestamp.h>
|
2011-11-29 18:05:07 +00:00
|
|
|
|
|
|
|
DECLARE_GLOBAL_DATA_PTR;
|
|
|
|
|
2014-11-06 20:20:06 +00:00
|
|
|
int arch_cpu_init(void)
|
2011-12-05 12:09:22 +00:00
|
|
|
{
|
|
|
|
int ret = get_coreboot_info(&lib_sysinfo);
|
2014-11-06 20:20:06 +00:00
|
|
|
if (ret != 0) {
|
2011-12-05 12:09:22 +00:00
|
|
|
printf("Failed to parse coreboot tables.\n");
|
2014-11-06 20:20:06 +00:00
|
|
|
return ret;
|
|
|
|
}
|
2012-10-23 18:04:33 +00:00
|
|
|
|
|
|
|
timestamp_init();
|
|
|
|
|
2014-11-06 20:20:06 +00:00
|
|
|
return x86_cpu_init_f();
|
2011-12-05 12:09:22 +00:00
|
|
|
}
|
|
|
|
|
2011-11-29 18:05:07 +00:00
|
|
|
int board_early_init_f(void)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2014-11-11 01:00:26 +00:00
|
|
|
int print_cpuinfo(void)
|
|
|
|
{
|
|
|
|
return default_print_cpuinfo();
|
|
|
|
}
|
|
|
|
|
2011-11-29 18:05:07 +00:00
|
|
|
int last_stage_init(void)
|
|
|
|
{
|
2013-04-17 16:13:48 +00:00
|
|
|
if (gd->flags & GD_FLG_COLD_BOOT)
|
|
|
|
timestamp_add_to_bootstage();
|
|
|
|
|
2011-11-29 18:05:07 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int board_eth_init(bd_t *bis)
|
|
|
|
{
|
|
|
|
return pci_eth_init(bis);
|
|
|
|
}
|
|
|
|
|
2014-11-06 20:20:08 +00:00
|
|
|
void board_final_cleanup(void)
|
2012-12-02 04:49:53 +00:00
|
|
|
{
|
2015-06-03 01:20:02 +00:00
|
|
|
/*
|
|
|
|
* Un-cache the ROM so the kernel has one
|
2012-12-02 04:49:53 +00:00
|
|
|
* more MTRR available.
|
2012-12-03 13:59:00 +00:00
|
|
|
*
|
|
|
|
* Coreboot should have assigned this to the
|
|
|
|
* top available variable MTRR.
|
2012-12-02 04:49:53 +00:00
|
|
|
*/
|
2015-01-01 23:18:07 +00:00
|
|
|
u8 top_mtrr = (native_read_msr(MTRR_CAP_MSR) & 0xff) - 1;
|
|
|
|
u8 top_type = native_read_msr(MTRR_PHYS_BASE_MSR(top_mtrr)) & 0xff;
|
2012-12-03 13:59:00 +00:00
|
|
|
|
|
|
|
/* Make sure this MTRR is the correct Write-Protected type */
|
2015-01-01 23:18:07 +00:00
|
|
|
if (top_type == MTRR_TYPE_WRPROT) {
|
|
|
|
struct mtrr_state state;
|
|
|
|
|
|
|
|
mtrr_open(&state);
|
|
|
|
wrmsrl(MTRR_PHYS_BASE_MSR(top_mtrr), 0);
|
|
|
|
wrmsrl(MTRR_PHYS_MASK_MSR(top_mtrr), 0);
|
|
|
|
mtrr_close(&state);
|
2012-12-03 13:59:00 +00:00
|
|
|
}
|
2012-12-02 04:49:53 +00:00
|
|
|
|
2012-11-03 11:41:35 +00:00
|
|
|
/* Issue SMI to Coreboot to lock down ME and registers */
|
|
|
|
printf("Finalizing Coreboot\n");
|
|
|
|
outb(0xcb, 0xb2);
|
2012-12-02 04:49:53 +00:00
|
|
|
}
|
2013-04-17 16:13:34 +00:00
|
|
|
|
2015-01-20 05:16:15 +00:00
|
|
|
int misc_init_r(void)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|